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MPC7447A

RISC Microprocessor Hardware Specifications

Freescale Semiconductor 

Electrical and Thermal Characteristics

5.2.2 Processor Bus AC Specifications

Table 9 provides the processor bus AC timing specifications for the MPC7447A as defined in Figure 4 and

Figure 5.

Table 9. Processor Bus AC Timing Specifications1

At recommended operating conditions. See Table 4.

Parameter

All Speed Grades

Symbol 2

Unit Notes

Min

Max

Input setup times:

A[0:35], AP[0:4]

tAVKH

1.8

D[0:63], DP[0:7]

tDVKH

1.8

AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3], GBL,

tIVKH

1.8

TT[0:3], QACK, TA, TBEN, TEA, TS, EXT_QUAL,

PMON_IN, SHD[0:1]

BMODE[0:1], BVSEL

tMVKH

1.8

Input hold times:

A[0:35], AP[0:4]

tAXKH

0

D[0:63], DP[0:7]

tDXKH

0

AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3], GBL,

tIXKH

0

TT[0:3], QACK, TA, TBEN, TEA, TS, EXT_QUAL,

PMON_IN, SHD[0:1]

BMODE[0:1], BVSEL

tMXKH

0

Output valid times:

A[0:35], AP[0:4]

tKHAV

—

D[0:63], DP[0:7]

tKHDV

—

AACK, BR, CI, CKSTP_IN, DRDY, DTI[0:3], GBL, HIT,

tKHOV

—

PMON_OUT, QREQ, TBST, TSIZ[0:2], TT[0:3], WT

TS

ARTRY, SHD[0:1]

tKHTSV

—

tKHARV

—

Output hold times:

A[0:35], AP[0:4]

tKHAX

0.5

D[0:63], DP[0:7]

tKHDX

0.5

AACK, BR, CI, CKSTP_IN, DRDY, DTI[0:3], GBL, HIT,

tKHOX

0.5

PMON_OUT, QREQ, TBST, TSIZ[0:2], TT[0:3], WT

TS

ARTRY, SHD[0:1]

tKHTSX

0.5

tKHARX

0.5

SYSCLK to output enable

tKHOE

0.5

SYSCLK to output high impedance (all except TS, ARTRY, tKHOZ

—

SHD0, SHD1)

SYSCLK to TS high impedance after precharge

Maximum delay to ARTRY/SHD0/SHD1 precharge

tKHTSPZ

—

tKHARP

—

ns

—

—

—

—

—

—

—

8

ns

—

—

—

—

—

—

—

—

8

ns

2.0

2.0

2.0

2.0

2.0

ns

—

—

—

—

—

—

ns

5

3.5

ns

5

1

tSYSCLK 3, 4, 5

1

tSYSCLK 3, 5, 6, 7

MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5

16

Freescale Semiconductor

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