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PTN3460

eDP to LVDS bridge IC

NXP Semiconductors. 

NXP Semiconductors

PTN3460

eDP to LVDS bridge IC

8.3.2 LVDS panel control

PTN3460 implements eDPv1.2 specific DPCD registers that concern panel power,

backlight and PWM controls and the DP source can issue AUX commands to initiate

panel power-up/down sequence as required. Also, PTN3460 supports LVDS panel control

pins — backlight enable, panel power enable and PWM — that can be set via AUX

commands.

• PVCCEN pin — the signal output is set based on SET_POWER DPCD register

00600h and SET_POWER_CAPABLE bit of

EDP_GENERAL_CAPABILITY_REGISTER_1 DPCD register 00701h and detection

and handling of video data stream by PTN3460

• BKLTEN pin — the signal output is set based on

BACKLIGHT_PIN_ENABLE_CAPABLE bit of

EDP_GENERAL_CAPABILITY_REGISTER_1 DPCD register 00701h and

BACKLIGHT_ENABLE bit of EDP_DISPLAY_CONTROL_REGISTER DPCD register

00720h

• PWMO pin — the PWM signal generated by PTN3460 based on controls set in

DPCD registers. In addition, PTN3460 can pass through PWM signal from eDP

source as well. Please refer to Ref. 2 for more information.

All the panel control enable and signal outputs from PTN3460 are aligned with panel

power-on sequence timing including LVDS video output generation. It is important to note

that the Panel power must be delivered by the system platform and it should be gated by

PVCCEN signal.

PTN3460

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 12 March 2014

© NXP Semiconductors N.V. 2014. All rights reserved.

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