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CS8900-CQ

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

least significant word of a multi-word datum is

located at the lowest address.

EEPROM Read-out

If the EEDI pin is asserted high at the end of

reset, the CS8900 reads the first word of

EEPROM data by:

1. Asserting EECS

2. Clocking out a Read-Register-00h command

on EEDO (EESK provides a 1MHz serial clock

signal)

3. Clocking the data in on EEDI.

If the EEDI pin is low at the end of the reset

signal, the CS8900 does not perform an

EEPROM read-out (uses its default configura-

tion).

Determining EEPROM Size: The CS8900 deter-

mines the size of the EEPROM by checking the

sense of EEDI on the tenth rising edge of EESK.

If EEDI is low, the EEPROM is a ’C46 or

’CS46. If EEDI is high, the EEPROM is a ’C56,

’CS56, ’C66, or ’CS66.

Loading Configuration Data: The CS8900 reads

in the first word from the EEPROM to determine

if configuration data is contained in the

EEPROM. If configuration data is not stored in

the EEPROM, the CS8900 terminates initializa-

tion from EEPROM and operates using its

default configuration (See Table 3.3). If configu-

ration data is stored in EEPROM, the CS8900

automatically loads all configuration data stored

in the Reset Configuration Block into its internal

PacketPage registers.

EEPROM Read-out Completion

Once all the configuration data are transferred to

the appropriate PacketPage registers, the CS8900

performs a checksum calculation to verify the

20

Reset Configuration Blocks data are valid. If the

resulting total is 0, the read-out is considered

valid. Otherwise, the CS8900 initiates a partial

reset to restore the default configuration.

If the read-out is valid, the EEPROMOK bit

(Register 16, SelfST, bit A) is set. EEPROMOK

is cleared if a checksum error is detected. In this

case, the CS8900 performs a partial reset and is

restored to its default. Once initialization is com-

plete (configuration loaded from EEPROM or

reset to default configuration) the INITD bit is

set (Register 16, SelfST, bit 7).

3.5 Programming the EEPROM

After initialization, the host can access the

EEPROM through the CS8900 by writing one of

seven commands to the EEPROM Command

register (PacketPage base + 0040h). Figure 3.2

shows the format of the EEPROM Command

register.

EEPROM Commands

The seven commands used to access the

EEPROM are: Read, Write, Erase, Erase/Write

Enable, Erase/Write Disable, Erase-All, and

Write-All. They are described in Table 3.7.

EEPROM Command Execution

During the execution of a command, the two Op-

code bits, followed by six bits of address (for a

’C46 or ’CS46) or eighth bits of address (for a

’C56, ’CS56, ’C66 or ’CS66), are shifted out of

the CS8900, into the EEPROM. If the command

is a Write, the data in the EEPROM Data register

(PacketPage base + 0042h) follows. If the com-

mand is a Read, the data in the specified

EEPROM location is written into the EEPROM

Data register. If the command is an Erase or

Erase-All, no data is transferred to or from the

EEPROM Data register. Before issuing any com-

mand, the host must wait for the SI-BUSY bit

DS150PP2

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