CS8900-CQ Ver la hoja de datos (PDF) - Cirrus Logic

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CS8900-CQ

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

not attempt to read configuration data from the

EEPROM.

Determining Number of Bytes in the Reset

Configuration Block: The low byte of the Reset

Configuration Block header is known as the link

byte. The value of the Link Byte represents the

number of bytes of configuration data in the Re-

set Configuration Block. The two bytes used for

the header are excluded when calculating the

Link Byte value.

For example, a Reset Configuration Block

header of A104h indicates a non-sequential

EEPROM programmed with a Reset Configura-

tion Block containing 4 bytes of configuration

data. This Reset Configuration Block occupies 6

bytes (3 words) of EEPROM space (2 bytes for

the header and 4 bytes of configuration data).

Groups of Configuration Data

Configuration data are arranged as groups of

words. Each group contains one or more words

of data that are to be loaded into PacketPage reg-

isters. The first word of each group is referred to

as the Group Header. The Group Header indi-

cates the number of words in the group and the

address of the PacketPage register into which the

first data word in the group is to be loaded. Any

remaining words in the group are stored in suc-

cessive PacketPage registers.

Group Header: Bits F through C of the Group

Header specify the number of words in each

group that are to be transferred to PacketPage

registers (see Figure 3.1). This value is two less

than the total number of words in the group, in-

cluding the Group Header. For example, if bits F

through C contain 0001, there are three words in

the group (a Group Header and two words of

configuration data).

Bits 8 through 0 of the Group Header specify a

9-bit PacketPage Address. This address defines

the PacketPage register that will be loaded with

DS150PP2

the first word of configuration data from the

group. Bits B though 9 of the Group Header are

forced to 0, restricting the destination address

range to the first 512 bytes of PacketPage mem-

ory. Figure 3.1 shows the format of the Group

header.

Reset Configuration Block Checksum

A checksum is stored in the high byte position

of the word immediately following the last group

of data in the Reset Configuration Block. (The

EEPROM address of the checksum value can be

determined by dividing the value stored in the

Link Byte by two). The checksum value is the

2’s complement of the 8-bit sum (any carry out

of eighth bit is ignored) of all the bytes in the

Reset Configuration Block, excluding the check-

sum byte. This sum includes the Reset

Configuration Block header at address 00h.

Since the checksum value is calculated as the 2 s

complement of the sum of all the preceding

bytes in the in the Reset Configuration Block, a

total of 0 should result when the checksum value

is added to the sum of the previous bytes.

EEPROM Example

Table 3.6 shows an example of a Reset Configu-

ration Block stored in a C46 EEPROM. Note

that little-endian word ordering is used, i.e., the

First Word of a Group of Words

F EDCBA9 8 7 6 5 4 3 2 1 0

000

Number of Words

9-bit PacketPage Address

in Group

Figure 3.1. Group Header

19

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