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CS8900-CQ

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

loaded into the CS8900 after each reset (except

EEPROM reset). The use of an EEPROM is op-

tional and is not required for all applications

(e.g. motherboard designs).

The CS8900 operates with any of six standard

EEPROM’s shown in Table 3.4.

3.4 Configuration with EEPROM

EEPROM Interface

The interface to the EEPROM consists of the

four signals shown in Table 3.5.

CS8900 Pin

(Pin #)

EECS

(Pin 3)

EESK

(Pin 4)

EEDO

(Pin 5)

EEDI

(Pin 6)

CS8900 Function

EEPROM Chip

Select

1 MHz EEPROM Serial

Clock output

EEPROM Data Out

(data to EEPROM)

EEPROM Data In (data

from EEPROM)

EEPROM

Pin

Chip Select

Clock

Data In

Data Out

Table 3.5 EEPROM Interface

EEPROM Memory Organization

If an EEPROM is used to store initial configura-

tion information for the CS8900, the EEPROM

is organized in one or more blocks of 16-bit

words. The first block in EEPROM, referred to

as the Configuration Block, is used to configure

the CS8900 after reset. An example of a typical

Configuration Block is shown in Table 3.6. Ad-

ditional blocks containing user data may be

stored in the EEPROM. However, the Configura-

tion Block must always start at address 00h and

be stored in contiguous memory locations.

DS150PP2

Reset Configuration Block

The first block in EEPROM, referred to as the

Reset Configuration Block, is used to automat-

ically program the CS8900 with an initial

configuration after a reset. Additional user data

may also be stored in the EEPROM if space is

available. The additional data are stored as 16-bit

words and can occupy any EEPROM address

space beginning immediately after the end of the

Reset Configuration Block up to address 7Fh,

depending on EEPROM size. This additional

data can only be accessed through software con-

trol (refer to Section 3.5 for more information on

accessing the EEPROM). Address space 80h to

AFh is reserved.

Reset Configuration Block Structure: The Reset

Configuration Block is a block of contiguous 16-

bit words starting at EEPROM address 00h. It

can be divided into three logical sections: a

header, one of more groups of configuration data

words, and a checksum value. All of the words

in the Reset Configuration Block are read se-

quentially by the CS8900 after each reset,

starting with the header and ending with the

checksum. Each group of configuration data is

used to program a PacketPage register (or set of

PacketPage registers in some cases) with an in-

itial non-default value.

Reset Configuration Block Header: The header

(first word of the block located at EEPROM ad-

dress 00h) specifies the type of EEPROM used,

whether or not a Reset Configuration block is

present, and if so, how many bytes of configura-

tion data are stored in the Reset Configuration

Block.

Determining the EEPROM Type: The LSB of

the high byte of the header indicates the type of

EEPROM attached: sequential or non-sequential.

An LSB of 0 (XXXX-XXX0) indicates a se-

quential EEPROM. An LSB of 1

(XXXX-XXX1) indicates a non-sequential

EEPROM. The CS8900 works equally well with

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