GT28F400B3B150 Ver la hoja de datos (PDF) - Intel
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GT28F400B3B150 Datasheet PDF : 49 Pages
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE
E
Start
Write 40H
Program Address/Data
Read Status Register
No
SR.7 = 1?
Yes
Full Status
Check if Desired
Program Complete
Bus Operation
Command
Comments
Write
Program Setup Data = 40H
Write
Program
Data = Data to Program
Addr = Location to Program
Read
Status Register Data Toggle
CE# or OE# to Update Status
Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent programming operations.
SR Full Status Check can be done after each program or after a sequence of
program operations.
Write FFH after the last program operation to reset device to read array mode.
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
SR.3 =
0
SR.4 =
1
VPP Range Error
1
Programming Error
0
SR.1 =
0
1
Attempted Program to
Locked Block - Aborted
Program Successful
Bus Operation
Command
Comments
Standby
Check SR.3
1 = VPP Low Detect
Standby
Check SR.4
1 = VPP Program Error
Standby
Check SR.1
1 = Attempted Program to
Locked Block - Program
Aborted
SR.3 MUST be cleared, if set during a program attempt, before further
attempts are allowed by the Write State Machine.
SR.1, SR.3 and SR.4 are only cleared by the Clear Staus Register Command,
in cases where multiple bytes are programmed before full status is checked.
If an error is detected, clear the status register before attempting retry or other
error recovery.
0580_07
Figure 7. Automated Word Programming Flowchart
22
PRELIMINARY
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