SA9101 Ver la hoja de datos (PDF) - South African Micro Electronic Systems

Número de pieza

componentes Descripción

Fabricante

SA9101

PCM FRAME ALIGNER

South African Micro Electronic Systems 

SA9101

Register

Name

CR5B0

CR5B1

CR5B2

CR5B3

CRC4

CR5B4

CR5B5

CR5B6

CR5B7

ADR 5 Data link bits for internal use

Bit

Description

0 Si (X)-bit in frame 15 Only if CRC4 processing activated and

Non- transparent or Extended TS0

1 S (X)-bit in frame 13 Signalling Transparent mode enabled.

i

2 S (X)-bit of frame alignment signal for international use, if

i

double frame format enabled and Non-transparent or Extended

TS0 Signalling Transparent mode enabled.

3 Automatic Transmission of Submultiframe Status (only in

mode, and Non-transparent or Extended TS0 signalling

transparent mode).

Instead of transmitting Si bits (CR5 bit 0 and 1), the sub-

multiframe status is inserted (SR 8, bit 1 -> X-bit(13), SR8 bit 0

-> X-bit(15).

4 Timeslot 0 Signalling Transparent mode. In Double frame and

CRC Multiframe modes Sn and Si bits of Timeslot 0 are

transmitted as applied on DXI.

5 Timeslot 0 Full Transparent mode

All information is transmitted as applied on DXI.

6 Interrupt Mask “Begin

Receive Multiframe”

7 Interrupt Mask "Begin

Transmit Multiframe"

A “1” enables interrupt source

only if alarm interrupt mode

enabled

sames

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