74LVC841ABQ Ver la hoja de datos (PDF) - NXP Semiconductors.
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74LVC841ABQ Datasheet PDF : 20 Pages
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NXP Semiconductors
11. Waveforms
74LVC841A
10-bit transparent latch with 5 V tolerant inputs/outputs; 3-state
VI
Dn input
GND
VOH
Qn output
VOL
VM
tPHL
VM
tPLH
mna884
Fig 7.
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
Input (Dn) to output (Qn) propagation delays
VI
LE input
GND
VOH
Qn output
VOL
VM
tW
t PHL
VM
t PLH
mna885
Fig 8.
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
Latch enable input (LE) pulse width, the latch enable input to output (Qn) propagation delays
VI
Dn input
GND
VI
LE input
GND
VM
th
t su
VM
th
t su
mna887
Fig 9.
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
The shaded areas indicate when the input is permitted to change for predicable output performance.
Data set-up and hold times for the Dn input to the LE input
74LVC841A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 2 April 2013
© NXP B.V. 2013. All rights reserved.
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