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LT3582EUD Ver la hoja de datos (PDF) - Linear Technology

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LT3582EUD Datasheet PDF : 28 Pages
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LT3582/LT3582-5/LT3582-12
APPLICATIONS INFORMATION
OTP2/REG2: Data in address 02h configures the output
voltage sequencing, sets a fine voltage adjust for VOUTP,
and determines if further OTP programming is permitted or
not. Proper uses of the bits in address 02h are discussed
in the following sections.
Setting the Output Voltages (VP, VPLUS and VN bits)
The LT3582 series contains two resistor dividers
which are programmable in the LT3582, to set the
output voltages. The positive output voltage VOUTP
is adjustable in 25mV steps by setting the VP bits in
REG0/OTP0 in addition to the VPLUS bit in REG2/OTP2.
VOUTP = 3.2V + (VP 50mV) + (VPLUS 25mV)
where:
VP = an integer value from 0 to 191
VPLUS = 0 or 1
The VOUTN voltage is adjustable in –50mV steps by setting
the VN bits in REG1/OTP1.
VOUTN = –1.2V – (VN 50mV)
where:
VN = an integer value from 0 to 255
Dynamically Changing the Output Voltage (LT3582 Only):
After output regulation has been reached, it’s possible to
change the output voltages by writing new values to the
VN or VP bits. When reducing the magnitude of an out-
put voltage, it will decay at a rate dependent on the load
current and capacitance. Configuring a large increase in
magnitude of an output voltage can cause a large increase
in switch current to charge the output capacitor. Before
reconfiguring the outputs, consider forcing a soft-start
by asserting the SWOFF bit before writing the new VP or
VN codes. Subsequently clearing SWOFF initiates the new
soft-start sequence.
Soft-Start/Output Voltage Ramping (IRMP bits)
The LT3582 series contains soft-start circuitry to control
the output voltage ramp rates, therefore limiting peak
switch currents during start-up. High switch currents are
inherent in switching regulators during startup since the
feedback loop is saturated due to VOUT being far from its
final value.The regulator tries to charge the outputcapacitor
as quickly as possible which results in large currents.
Capacitors must be connected from RAMPP & RAMPN
to ground for soft-start. During shutdown or when the
SWOFF bit is set, the RAMP capacitors are discharged
to ground. After SHDN rises or SWOFF is cleared, the
capacitors are charged by programmable (LT3582 only)
currents, thus creating linear voltage ramps. The VOUT
voltages ramp in proportion to their respective RAMP
voltages according to:
VOUT
_
RAMP
_
RATE
=
0VO.8UVT


CIRRAAMMPP



Volts
/
Sec
Proportionality Constant
RAMP pin ramp rate (V/Sec)
where:
IRAMP = RAMP pin charging current set by IRMP
bits (1μA, 2μA, 4μA or 8μA for LT3582,
1μA for LT3582-5/LT3582-12)
CRAMP = External RAMP pin capacitor (Farads)
VOUT = Output voltage during regulation
For example, selecting IRAMP = 1μA, CRAMP = 10nF and
VOUTP = 12V results in a power-up ramp rate of 1.5Volt/ms
(see Figure 6).
Ramp rates less than 1-10V/ms generally result in good
startup characteristics. The outputs should linearly follow
the RAMPx voltages with no distortions. Figure 7 shows
an excessive startup ramp rate of ~120V/ms in which sev-
eral startup issues have occurred: A) the expected VOUTP
ramp up path is not followed B) inductor current ringing
occurs C) the VOUTP ramp rate is limited due to the output
14
3582512f

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