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LT3582EUD

I2C Programmable Boost and Single Inductor Inverting DC/DC Converters with OTP

Linear Technology 

LT3582/LT3582-5/LT3582-12

APPLICATIONS INFORMATION

Since the LT3582 series won’t power-down until both

outputs are discharged (when power-down sequencing

is enabled), make sure VOUTP & VOUTN can be grounded.

This is not a problem in most topologies. However, read

the section Output Disconnect Operating Limits for ad-

ditional information.

Configuration Lockout (LOCK bit)

After a desired configuration is programmed into OTP, the

LOCK bit can be set to prohibit subsequent changes to the

configuration. The LT3582-5 and LT3582-12 are precon-

figured with the LOCK bit set to a logic “1” which:

• Forces the chip to use the OTP configuration

only.

• Forces all I2C reads from addresses 0-2 to return

OTP data.

• Prohibits any further programming of the OTP

memory. Any further attempts to program OTP leaves

the OTP memory unchanged and sets the FAULT bit

in the CMDR.

The LOCK OTP bit is set by programming a logic “1” into

bit 6 of OTP2. Regardless of the RSEL2 setting, I2C reads

of the LOCK bit always indicate the LOCKed or unlocked

state of the OTP memory.

OTP Programming (LT3582 only)

The LT3582 contains One Time Programmable non-vola-

tile memory to permanently store the chip configuration.

Before programming, it’s recommended to set the SWOFF

bit to disable switching activity and prevent unexpected

chip behavior while the configuration is being changed.

Programming involves the transfer of information from

the REG bytes to the OTP bytes. Therefore, valid data

must first be written to the desired REG bytes. After the

REG bytes are written, they are selected by setting the

corresponding RSEL bits in the CMDR. This forces the chip

into the desired configuration and selects those bytes for

programming to OTP. After 15V has been applied to VPP,

the WOTP bit is set in the CMDR to start the programming.

Finally, the WOTP bit is cleared to finish the programming.

An example programming algorithm is given below.

OTP programming draws about 3-6mA per bit from the

VPP pin. It is possible to program all 23 bits simultane-

ously (up to ~138mA), but it is recommended that one byte

is programmed at a time to reduce noise on VPP caused

by the sudden change in current. A 1-10μF VPP bypass

capacitor is also recommended to prevent voltage droop

after programming begins. Also, avoid hot-plugging VPP

which results in very fast voltage ramp rates and can lead

to excessive voltage on the VPP pin.

Example OTP Programming Algorithm:

1. Apply 15V to the VPP pin. This can be done at any

time before step 5.

2. Write 50h to the CMDR. This disables the power

switches during programming by setting the SWOFF

bit in the CMDR. This also clears the FAULT bit.

3. Write desired data to REG0-REG2.

4. Write 11h to the CMDR. This selects REG0 for pro-

gramming while keeping the switches off.

5. Write 91h to the CMDR. This programs the REG0

data to OTP0.

6. Write 11h to the CMDR. This command can be sent

immediately after step 5. This stops the program-

ming.

7. Read the CMDR and verify that the FAULT bit is

not set.

8. Repeat steps 4-7 for the remaining bytes that need

programming.

9. Write 10h to the CMDR. This selects the OTP data

for read verification.

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