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HT46R14A Ver la hoja de datos (PDF) - Holtek Semiconductor

Número de pieza
componentes Descripción
Fabricante
HT46R14A
Holtek
Holtek Semiconductor Holtek
HT46R14A Datasheet PDF : 49 Pages
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HT46R14A
Bit No.
0
1
2
3
4
5
6
7
Label
ET0I
ET1I
EADI
¾
T0F
T1F
ADF
¾
Function
Control the Timer/Event Counter 0 interrupt (1=enabled; 0=disabled)
Control the Timer/Event Counter 1 interrupt (1=enabled; 0=disabled)
Control the A/D converter interrupt
Unused bit, read as ²0²
Internal Timer/Event Counter 0 request flag (1=active; 0=inactive)
Internal Timer/Event Counter 1 request flag (1=active; 0=inactive)
A/D converter request flag (1=active; 0=inactive)
Unused bit, read as ²0²
MFIC (1BH) Register
During the execution of an interrupt subroutine, other in-
terrupt acknowledgements are held until the ²RETI² in-
struction is executed or the EMI bit and the related
interrupt control bit are set to 1, if the stack is not full. To
return from the interrupt subroutine, a RET or RETI
instruction may be executed. The RETI instruction will set
the EMI bit to re-enable an interrupt service, but the RET
will not.
Interrupts, occurring in the interval between the rising
edges of two consecutive T2 pulses, will be serviced on
the latter of the two T2 pulses, if the corresponding inter-
rupts are enabled. In the case of simultaneous requests
the following table shows the priority that is applied.
These can be masked by resetting the EMI bit.
Interrupt Source
Priority Vector
External interrupt 0
1
004H
External interrupt 1
2
008H
Comparator 0 output interrupt
3 00CH
Comparator 1 output interrupt
4
010H
External interrupt 2 (from PC1)
5
014H
Multi-function interrupt (Timer/
event counter 0/1 & ADC converter)
6
018H
The EMI, EEI0, EEI1, EC0I, ET0I, ET1I, and EMFI are
all used to control the enable/disable status of inter-
rupts. These bits prevent the requested interrupt from
being serviced. Once the interrupt request flags (EI0F,
EI1F, C0F, T0F, T1F, MFI) are all set, they remain in the
INTC1 or INTC0 respectively until the interrupts are ser-
viced or cleared by a software instruction. It is recom-
mended that a program does not use the ²CALL
subroutine² within the interrupt subroutine. Interrupts of-
ten occur in an unpredictable manner or need to be ser-
viced immediately in some applications. If only one stack
is left and enabling the interrupt is not well controlled, the
original control sequence will be damaged if the ²CALL²
operates within the interrupt subroutine.
Oscillator Configuration
There are two types of system oscillator circuits within the
microcontroller. These are an RC oscillator and a Crys-
tal oscillator, the choice of which is determined via a
configuration option. The Power-down mode stops the
system oscillator and ignores an external signal to con-
serve power.
V DD
O SC1
O SC1
O SC2
fS Y S /4
O SC2
N M O S O p e n D r a in
C r y s ta l O s c illa to r
R C O s c illa to r
System Oscillator
If an RC oscillator is used, an external resistor between
OSC1 and VSS is required and whose resistance
should range from 24kW to 1MW. Pin OSC2 can be
used to monitor the system frequency at 1/4 the system
frequency or can be used to synchronize external cir-
cuitry. The RC oscillator provides the most cost effec-
tive means of oscillator implementation, however, the
frequency of oscillation may vary with VDD, tempera-
ture and process variations. It is, therefore, not recom-
mended for use in timing sensitive applications where
an accurate oscillator frequency is desired.
If a Crystal oscillator is used, a crystal connected be-
tween OSC1 and OSC2 is required. No other external
components are required. Instead of a crystal, a resona-
tor can also be connected between OSC1 and OSC2 to
obtain a frequency reference, but two external capaci-
tors connected between OSC1, OSC2 and ground are
required, if the oscillating frequency is less than 1MHz.
When the system enters the Power-down mode the sys-
tem oscillator is stopped to conserve power.
The WDT oscillator is a free running on-chip RC oscillator,
and no external components are required. Even if the sys-
tem enters the power down mode where the system clock
is stopped, the WDT oscillator will continue to operate with
a period of approximately 65ms at 5V. The WDT oscillator
can be disabled using a configuration option to conserve
power.
Rev. 1.00
11
August 3, 2007

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