AD9250(Rev0) Ver la hoja de datos (PDF) - Analog Devices
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Fabricante
AD9250
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
AD9250 Datasheet PDF : 44 Pages
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Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD9250
AVDD 1
RFCLK 2
CLK– 3
CLK+ 4
AVDD 5
SYSREF+ 6
SYSREF– 7
AVDD 8
DVDD 9
RST 10
DVDD 11
DNC 12
AD9250
TOP VIEW
(Not to Scale)
36 AVDD
35 DNC
34 PDWN
33 CS
32 SCLK
31 SDIO
30 DVDD
29 DNC
28 DNC
27 FDA
26 FDB
25 DVDD
NOTES
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED THERMAL PADDLE ON THE BOTTOM OF THE
PACKAGE PROVIDES THE GROUND REFERENCE FOR
DRVDD AND AVDD. THIS EXPOSED PADDLE MUST BE
CONNECTED TO GROUND FOR PROPER OPERATION.
Figure 4. Pin Configuration (Top View)
Table 8. Pin Function Descriptions
Pin No.
ADC Power Supplies
1, 5, 8, 36, 37, 40, 41, 43, 44, 47, 48
9, 11, 13, 16, 24, 25, 30
12, 28, 29, 35
17, 23
20
Mnemonic
AVDD
DVDD
DNC
DGND
DRVDD
Exposed Paddle
AGND/DRGND
ADC Analog
2
3
4
38
39
42
45
46
ADC Fast Detect Outputs
26
27
Digital Inputs
6
7
14
15
RFCLK
CLK−
CLK+
VIN−A
VIN+A
VCM
VIN+B
VIN−B
FDB
FDA
SYSREF+
SYSREF−
SYNCINB+
SYNCINB−
Type
Description
Supply
Supply
Supply
Ground
Analog Power Supply (1.8 V Nominal).
Digital Power Supply (1.8 V Nominal).
Do Not Connect.
Ground Reference for DVDD.
JESD204B PHY Serial Output Driver Supply (1.8 V Nominal).
Note that the DRVDD power is referenced to the AGND Plane.
The exposed thermal paddle on the bottom of the package
provides the ground reference for DRVDD and AVDD. This
exposed paddle must be connected to ground for proper
operation.
Input
Input
Input
Input
Input
Output
Input
Input
ADC RF Clock Input.
ADC Nyquist Clock Input—Complement.
ADC Nyquist Clock Input—True.
Differential Analog Input Pin (−) for Channel A.
Differential Analog Input Pin (+) for Channel A.
Common-Mode Level Bias Output for Analog Inputs. Decouple
this pin to ground using a 0.1 µF capacitor.
Differential Analog Input Pin (+) for Channel B.
Differential Analog Input Pin (−) for Channel B.
Output
Output
Channel B Fast Detect Indicator (CMOS Levels).
Channel A Fast Detect Indicator (CMOS Levels).
Input
Input
Input
Input
Active Low JESD204B LVDS SYSREF Input—True
Active Low JESD204B LVDS SYSREF Input—Complement.
Active Low JESD204B LVDS SYNC Input—True
Active Low JESD204B LVDS SYNC Input—Complement.
Rev. 0 | Page 11 of 44
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