AD9250(Rev0) Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Fabricante

AD9250
(Rev.:Rev0)

14-Bit, 170 MSPS/250 MSPS, JESD204B, Dual Analog-to-Digital Converter

Analog Devices 

AD9250

Pin No.

Data Outputs

18

19

21

22

DUT Controls

10

31

32

33

34

Mnemonic

SERDOUT1+

SERDOUT1−

SERDOUT0−

SERDOUT0+

RST

SDIO

SCLK

CS

PDWN

Data Sheet

Type

Description

Output

Output

Output

Output

Lane B CML Output Data—True.

Lane B CML Output Data—Complement.

Lane A CML Output Data—Complement.

Lane A CML Output Data—True.

Input

Input/Output

Input

Input

Input

Digital Reset (Active Low).

SPI Serial Data I/O.

SPI Serial Clock.

SPI Chip Select (Active Low).

Power-Down Input (Active High). The operation of this pin

depends on the SPI mode and can be configured as power-

down or standby (see Table 17).

Rev. 0 | Page 12 of 44

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