Introduction
Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
HD0
BGA LQFP
Pin No. Pin No.
J3
33
Type
Input
Description
Host Address (HD0)—This input provides data selection for HI
registers.
This pin is disconnected internally during reset.
GPIOB0
HD1
K2
Input/Output Port B GPIO (0)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
34
Input
Host Address (HD1)—This input provides data selection for HI
registers.
This pin is disconnected internally during reset.
GPIOB1
HD2
L2
Input/Output Port B GPIO (1)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
35
Input
Host Address (HD2)—This input provides data selection for HI
registers.
This pin is disconnected internally during reset.
GPIOB2
HD3
J4
Input/Output Port B GPIO (2)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
40
Input
Host Address (HD3)—This input provides data selection for HI
registers.
This pin is disconnected internally during reset.
GPIOB3
HD4
L4
Input/Output Port B GPIO (3)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
41
Input
Host Address (HD4)—This input provides data selection for HI
registers.
This pin is disconnected internally during reset.
GPIOB4
HD5
J5
Input/Output Port B GPIO (4)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
42
Input
Host Address (HD5)—This input provides data selection for HI
registers.
This pin is disconnected internally during reset.
GPIOB5
Input/Output Port B GPIO (5)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
56858 Technical Data, Rev. 6
Freescale Semiconductor
13