56858 Ver la hoja de datos (PDF) - Freescale Semiconductor
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56858 Datasheet PDF : 64 Pages
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Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
RD
BGA LQFP
Pin No. Pin No.
H7
81
G7
94
F9
95
F10
96
F11
97
E10
98
D7
120
B7
121
E7
122
F8
123
F7
124
D5
137
B4
138
C4
142
F6
143
B3
144
D3
8
Type
Description
Input/
Output(Z)
Data Bus (D0-D15)—These pins provide the bidirectional data for
external program or data memory accesses.
Output
Read Enable (RD) — is asserted during external memory read cycles.
WR
D4
9
Output
This signal is pulled high during reset.
Write Enable (WR) —is asserted during external memory write cycles.
This signal is pulled high during reset.
CS0
H8
83
Output
External Chip Select (CS0)—This pin is used as a dedicated GPIO.
GPIOA0
CS1
H9
Input/Output Port A GPIO (0) —This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
84
Output
External Chip Select (CS1)—This pin is used as a dedicated GPIO.
GPIOA1
CS2
H11
Input/Output Port A GPIO (1) —This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
85
Output
External Chip Select (CS2)—This pin is used as a dedicated GPIO.
GPIOA2
CS3
H10
Input/Output Port A GPIO (2) —This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
86
Output
External Chip Select (CS3)—This pin is used as a dedicated GPIO.
GPIOA3
Input/Output Port A GPIO (3)—This pin is a General Purpose I/O (GPIO) pin when
not configured for host port usage.
56858 Technical Data, Rev. 6
12
Freescale Semiconductor
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