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CXD3021R Ver la hoja de datos (PDF) - Sony Semiconductor

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CXD3021R Datasheet PDF : 161 Pages
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CXD3021R
Pin Symbol
I/O
No.
Description
34 DA08 O 1, 0 DA08 output when PSSL = 1, GFS output when PSSL = 0.
35 DA07 O 1, 0 DA07 output when PSSL = 1, RFCK output when PSSL = 0.
36 DVDD2
Digital power supply.
37 DA06 O 1, 0 DA06 output when PSSL = 1, C2PO output when PSSL = 0.
38 DA05 O 1, 0 DA05 output when PSSL = 1, XRAOF output when PSSL = 0.
39 DA04 O 1, 0 DA04 output when PSSL = 1, MNT3 output when PSSL = 0.
40 DA03 O 1, 0 DA03 output when PSSL = 1, MNT2 output when PSSL = 0.
41 DA02 O 1, 0 DA02 output when PSSL = 1, MNT1 output when PSSL = 0.
42 DA01 O 1, 0 DA01 output when PSSL = 1, MNT0 output when PSSL = 0.
43 DVSS2
Digital GND.
44 XTSL
I
Crystal selection input.
45 MCKO O 1, 0 Clock output. Inverted output of XTLI.
46 FSTIO
I/O 1, 0
Digital servo clock input/output.
(2/3 frequency division for XTLI pin is internally connected.)
47 C4M
O 1, 0 1/4 frequency division output for XTLI pin. Changes with variable pitch.
48 C16M O 1, 0 16.9344MHz output. Changes simultaneously with variable pitch.
49 DVDD3
Digital power supply.
50 MD2
I
Digital Out on/off control (low = off, high = on).
51 DOUT O 1, 0 Digital Out output.
52 MUTE I
Mute (low: off, high: on).
53 WFCK O 1, 0 WFCK (Write Frame Clock) output.
54 SCOR O 1, 0 Outputs a high signal when either subcode sync S0 or S1 is detected.
55 SBSO O 1, 0 Sub P to W serial output.
56 EXCK I
SBSO readout clock input.
57 SQSO O 1, 0 Sub-Q 80-bit, PCM peak and level data 16-bit outputs.
58 SQCK I
SQSO readout clock input.
59 SCSY I
GRSCOR resynchronization input. Normally low, resynchronization is
executed when high.
60 XRST I
System reset. Reset when low.
61 XWO
I
Audio DAC sync window open input. Normally high, window open when low.
62 RMUTO O 1, 0 Audio DAC right channel zero detection flag.
63 LMUTO O 1, 0 Audio DAC left channel zero detection flag.
64 DVSS3
Digital GND.
65 AVSS4
Analog GND.
66 PWMRN O 1, Z, 0 Audio DAC PWM output. Right channel, reversed phase.
67 PWMRP O 1, Z, 0 Audio DAC PWM output. Right channel, forward phase.
–6–

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