CXD3021 Ver la hoja de datos (PDF) - Sony Semiconductor

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CXD3021

CD Digital Signal Processor with Built-in Digital Servo and DAC

Sony Semiconductor 

CXD3021R

Pin Description

Pin

No.

Symbol

I/O

Description

1 SE

I

Sled error signal input.

2 FE

I

Focus error signal input.

3 VC

I

Center voltage input.

4 VPCO1 O 1, Z, 0 Wide-band EFM PLL VCO2 charge pump output.

5

VPCO2

O

1, Z, 0

Wide-band EFM PLL VCO2 charge pump output 2. Turned on and off by $EX

command FCSW.

6 VCTL

I

Wide-band EFM PLL VCO2 control voltage input.

7 FILO

O Analog Master PLL filter output (slave = digital PLL).

8 FILI

I

Master PLL filter input.

9 PCO

O 1, Z, 0 Master PLL charge pump output.

10 CLTV

I

Multiplier VCO control voltage input.

11 AVSS1

Analog GND.

12 RFAC I

EFM signal input.

13 BIAS

I

Asymmetry circuit constant current input.

14 ASYI

I

Asymmetry comparator voltage input.

15 ASYO O 1, 0 EFM full-swing output (low = VSS, high = VDD).

16 AVDD1

Analog power supply.

17 DVDD1

Digital power supply.

18 DVSS1

Digital GND.

19 ASYE I

Asymmetry circuit on/off (low = off, high = on).

20 PSSL

I

Audio data output mode switching input (low: serial, high: parallel).

21 WDCK O 1, 0 D/A interface for 48-bit slot. Word clock f = 2Fs.

22 LRCK O 1, 0 D/A interface for 48-bit slot. LR clock f = Fs.

23 LRCKI I

LR clock input to DAC (48-bit slot).

24 DA16

O

1, 0

DA16 (MSB) output when PSSL = 1, 48-bit slot serial data output (two's

complement, MSB first) when PSSL = 0.

25 PCMDI I

Audio data input to DAC (48-bit slot).

26 DA15 O 1, 0 DA15 output when PSSL = 1, 48-bit slot bit clock output when PSSL = 0.

27 BCKI

I

Bit clock input to DAC (48-bit slot).

28 DA14

O

1, 0

DA14 output when PSSL = 1, 32-bit/64-bit slot serial data output (two'

complement, LSB first) when PSSL = 0.

29 DA13 O 1, 0 DA13 output when PSSL = 1, 32-bit/64-bit slot bit clock output when PSSL = 0.

30 DA12 O 1, 0 DA12 output when PSSL = 1, 32-bit/64-bit slot LR clock output when PSSL = 0.

31 DA11 O 1, 0 DA11 output when PSSL = 1, GTOP output when PSSL = 0.

32 DA10 O 1, 0 DA10 output when PSSL = 1, XUGF output when PSSL = 0.

33 DA09 O 1, 0 DA09 output when PSSL = 1, XPLCK output when PSSL = 0.

–5–

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