UPD16498 Ver la hoja de datos (PDF) - NEC => Renesas Technology
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UPD16498
NEC => Renesas Technology
UPD16498 Datasheet PDF : 95 Pages
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µPD16498
4. PIN I/O CIRCUITS AND RECOMMENDED CONNECTION OF UNUSED PINS
The I/O circuit type of each pin and recommended connection of unused pins are described below.
Pin Name
Input Type
Input/output
Recommended Connection of Unused Pins
PSX
/CS1
CS2
/RD(E)
Schmitt trigger
Filter
Filter
Filter
/WR(R,/W)
C86
RDS
P0 to P5
P6(SCL)
P7(SI)
RS
/RES
CLS
IRS
SIGIN1
SIGIN2
OSCIN1
OSCIN2
OSCOUT
TFR
TFRSYNC
TDOF
TSISYNC
TM/S
TOSCSYNC
TSTIFS
TSTRTST
TSTVIHL
TESTOUT
Filter
Schmitt trigger
Schmitt trigger
Filter
Filter
Filter
Filter
Schmitt trigger
Schmitt trigger
Schmitt trigger
Schmitt trigger
Schmitt trigger
Schmitt trigger
Schmitt trigger
−
CMOS
CMOS
CMOS
CMOS
Schmitt trigger
−
Schmitt trigger
Schmitt trigger
Schmitt trigger
－
Input
Input
Input
Input
Input
Input
Input
Input/output
Input/output
Input/output
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
Output
Input
Output
Input
Input
Input
Output
Mode setting pin.
Connect to VSS.
Connect to VDD1.
Connect to VDD1 (i80 series interface), connect to VDD1
or VSS (serial interface).
Connect to VDD1 or VSS (serial interface).
Mode setting pin.
Mode setting pin.
Leave open
−
−
Register setting pin.
Connect to VDD1.
Mode setting pin
Mode setting pin.
Connect to VDD1 or VSS.
Connect to VDD1 or VSS.
−
Connect to VDD1 or VSS (CLS = H)
Leave open (when using external clock)
Leave open
Leave open
Leave open
Leave open
Connect to VDD1
Leave open
Connect to VSS (during normal use)
Connect to VSS (during normal use)
Connect to VSS (during normal use)
Leave open
Notes 1. Connect to either VDD1 or VSS, depending on the mode setting.
2. Input either VDD1 or VSS output from CPU, depending on the mode setting.
Notes
Note 1
−
−
−
−
Note 1
Note 1
−
−
−
Note 2
−
Note 1
Note 1
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Data Sheet S15730EJ2V0DS
15
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