T431616D Ver la hoja de datos (PDF) - Taiwan Memory Technology

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T431616D

1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM

Taiwan Memory Technology 

tm TE

CH

T431616D/E

• Test Mode field (A8~A7)

These two bits are used to enter the test mode and must be programmed to "00" in normal operation.

A8 A7

Test Mode

0

0

normal mode

0

1

Vendor Use Only

1

X

Vendor Use Only

• Single Write Mode (A9)

This bit is used to select the write mode. When the BS bit is "0", the Burst-Read-Burst-Write mode is

selected. When the BS bit is "1", the Burst-Read-Single-Write mode is selected.

A9

Single Write Mode

0

Burst-Read-Burst-Write

1

Burst-Read-Single-Write

Note: A10 and A11 should stay “L” during mode set cycle.

8 No-Operation command

(RAS# = "H", CAS# = "H", WE# = "H")

The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS# is Low).

This prevents unwanted commands from being registered during idle or wait states.

9 Burst Stop command

(RAS# = "H", CAS# = "H", WE# = "L")

The Burst Stop command is used to terminate either fixed-length or full-page bursts. This command is only

effective in a read/write burst without the auto precharge function. The terminated read burst ends after a delay

equal to the CAS# latency (refer to the following figure). The termination of a write burst is shown in the

following figure.

T0

T1

T2

T3

T4

T5

T6

T7

T8

CLK

COMMAND

READ A

NOP

NOP

NOP

Burst Stop

NOP

NOP

NOP

NOP

CAS# latency=1

tCK1, DQ's

DOUT A0 DOUT A1

DOUT A2 DOUT A3

The burst ends after a delay equal to the CAS# latency.

CAS# latency=2

tCK2, DQ's

DOUT A0 DOUT A1

DOUT A2 DOUT A3

CAS# latency=3

tCK3, DQ's

DOUT A0 DOUT A1

DOUT A2 DOUT A3

Termination of a Burst Read Operation (Burst Length • 4, CAS# Latency = 1, 2, 3)

TM Technology Inc. reserves the right

P. 14

to change products or specifications without notice.

Publication Date: FEB. 2007

Revision: A

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