EM78P142SS10J Ver la hoja de datos (PDF) - ELAN Microelectronics
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EM78P142SS10J Datasheet PDF : 96 Pages
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EM78P142
8-Bit Microprocessor with OTP ROM
"JMP" instruction allows direct loading of the lower 10 program counter bits. Thus,
"JMP" allows PC to jump to any location within a page.
"CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed into
the stack. Thus, the subroutine entry address can be located anywhere within a
page.
"LJMP" instruction allows direct loading of the program counter bits (A0~A10).
Therefore, "LJMP" allows PC to jump to any location within 2K (211).
"LCALL" instruction loads the program counter bits (A0 ~A10), and then PC+1 is
pushed into the stack. Thus, the subroutine entry address can be located
anywhere within 2K (211)
"RET" ("RETL k", "RETI") instruction loads the program counter with the contents
of the top of stack.
"ADD R2, A" allows a relative address to be added to the current PC, and the ninth
and above bits of the PC will increase progressively.
"MOV R2, A" allows loading of an address from the "A" register to the lower 8 bits of
the PC, and the ninth and tenth bits (A8 ~ A9) of the PC will remain unchanged.
Any instruction (except “ADD R2,A”) that is written to R2 (e.g., "MOV R2, A", "BC
R2, 6", etc.) will cause the ninth bit and the tenth bit (A8 ~ A9) of the PC to remain
unchanged.
All instructions are single instruction cycle (fclk/2) except “LCALL” and “LJMP”
instructions. The “LCALL” and “LJMP” instructions need two instructions cycle.
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Product Specification (V1.0) 01.25.2008
(This specification is subject to change without further notice)
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