AT/TS8xC54/8X2
Table 10-3. IP Register
IP - Interrupt Priority Register (B8h)
7
6
5
4
3
2
1
0
-
-
PT2
PS
PT1
PX1
PT0
PX0
Bit
Bit
Number Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
PT2
Timer 2 overflow interrupt Priority bit
Refer to PT2H for priority level.
4
PS
Serial port Priority bit
Refer to PSH for priority level.
3
PT1
Timer 1 overflow interrupt Priority bit
Refer to PT1H for priority level.
2
PX1
External interrupt 1 Priority bit
Refer to PX1H for priority level.
1
PT0
Timer 0 overflow interrupt Priority bit
Refer to PT0H for priority level.
0
PX0
External interrupt 0 Priority bit
Refer to PX0H for priority level.
Reset Value = XX00 0000b
Bit addressable
27
4431E–8051–04/06