AD9250(Rev0) Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD9250
(Rev.:Rev0)
(Rev.:Rev0)
Analog Devices
AD9250 Datasheet PDF : 44 Pages
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Data Sheet
AD9250
A0
A1
A2
A3
VINA+
A4
A5
ADC A6
VINA–
A7
A8
A9
A10
A PATH
A11
A12
A13
ADC
TEST PATTERN
16-BIT
JESD204B
TEST PATTERN
8-BIT
JESD204B
TEST PATTERN
10-BIT
A8 A0
A9 A1
A10 A2
A11 A3
A12 A4
A13 A5
C0 A6
C1 A7
OPTIONAL
SCRAMBLER
1 + x14 + x15
8B/10B
ENCODER/
CHARACTER
REPLACMENT
SERIALIZER
SERDOUT±
S8 S0
S9 S1
S10 S2
S11 S3
S12 S4
S13 S5
S14 S6
S15 S7
E10 E0
E11 E1
E12 E2
E13 E3
E14 E4
E15 E5
E16 E6
E17 E7
E18 E8
E19 E9
E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 . . . E19
~SYNC t
SYSREF
Figure 51. AD9250 Digital Processing of JESD204B Lanes
Table 13. AD9250 JESD204B Typical Configurations
JESD204B
Configure
Setting
M (No. of Converters), L (No. of Lanes),
Register 0x71,
Register 0x6E,
Bits[7:0]
Bit[0]
0x11
1
1
0x12
1
2
0x21
2
1
0x22 (Default) 2
2
F (Octets/Frame),
Register 0x6F,
Bits[7:0], Read Only
2
1
4
2
S (Samples/ADC/Frame),
Register 0x74, Bits[4:0],
Read Only
1
1
1
1
HD (High Density Mode),
Register 0x75, Bit[7],
Read Only
0
1
0
0
DATA
FROM
ADC
FRAME
ASSEMBLER
(ADD TAIL BITS)
OPTIONAL
SCRAMBLER
1 + x14 + x15
8B/10B
ENCODER
Figure 52. AD9250 ADC Output Data Path
TO
RECEIVER
Table 14. AD9250 JESD204B Frame Alignment Monitoring and Correction Replacement Characters
Scrambling Lane Synchronization Character to be Replaced
Last Octet in
Multiframe
Off
On
Last octet in frame repeated from previous frame No
Off
On
Last octet in frame repeated from previous frame Yes
Off
Off
Last octet in frame repeated from previous frame Not applicable
On
On
Last octet in frame equals D28.7
No
On
On
Last octet in frame equals D28.3
Yes
On
Off
Last octet in frame equals D28.7
Not applicable
Replacement Character
K28.7
K28.3
K28.7
K28.7
K28.3
K28.7
Frame and Lane Alignment Monitoring and Correction
Frame alignment monitoring and correction is part of the JESD204B
specification. The 14-bit word requires two octets to transmit all
the data. The two octets (MSB and LSB), where F = 2, make up
a frame. During normal operating conditions, frame alignment
is monitored via alignment characters, which are inserted under
certain conditions at the end of a frame. Table 14 summarizes the
conditions for character insertion along with the expected characters
under the various operation modes. If lane synchronization is
enabled, the replacement character value depends on whether
the octet is at the end of a frame or at the end of a multiframe.
Based on the operating mode, the receiver can ensure that it is
still synchronized to the frame boundary by correctly receiving
the replacement characters.
Rev. 0 | Page 27 of 44
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