A40MX02 Ver la hoja de datos (PDF) - Unspecified

Número de pieza

componentes Descripción

Fabricante

A40MX02

40MX and 42MX FPGA Families

Unspecified 

40MX and 42MX FPGA Families

Output Drive Characteristics for 5.0V PCI Signaling

MX PCI device I/O drivers were designed specifically for high-performance PCI systems. Figure 1-16 on page 1-21 shows

the typical output drive characteristics of the MX devices. MX output drivers are compliant with the PCI Local Bus

Specification.

Table 17 • DC Specification (5.0V PCI Signaling)1

PCI

MX

Symbol

VCCI

VIH

VIL

IIH

IIL

VOH

VOL

Parameter

Supply Voltage for I/Os

Input High Voltage

Input Low Voltage

Input High Leakage Current

Input Low Leakage Current

Output High Voltage

Output Low Voltage

Condition

VIN = 2.7V

VIN=0.5V

IOUT = –2 mA

IOUT = –6 mA

IOUT = 3 mA,

6 mA

Min.

4.75

2.0

–0.5

2.4

Max.

5.25

VCC + 0.5

0.8

70

–70

0.55

Min.

4.75

2.0

–0.3

—

—

3.84

—

Max.

5.252

VCCI + 0.3

0.8

10

–10

Units

V

V

V

µA

µA

V

0.33

V

CIN

Input Pin Capacitance

10

—

10

pF

CCLK

LPIN

CLK Pin Capacitance

Pin Inductance

5

12

—

10

pF

20

—

< 8 nH3

nH

Notes:

1. PCI Local Bus Specification, Version 2.1, Section 4.2.1.1.

2. Maximum rating for VCCI –0.5V to 7.0V.

3. Dependent upon the chosen package. PCI recommends QFP and BGA packaging to reduce pin inductance and capacitance.

Table 18 • AC Specifications (5.0V PCI Signaling)*

PCI

Symbol

ICL

Parameter

Low Clamp Current

Condition

–5 < VIN ≤ –1

Min.

–25 + (VIN +1)

/0.015

Slew (r)

Output Rise Slew Rate

0.4V to 2.4V load

1

Slew (f)

Output Fall Slew Rate

2.4V to 0.4V load

1

Note: *PCI Local Bus Specification, Version 2.1, Section 4.2.1.2.

Max.

5

5

MX

Min.

Max.

–60

–10

1.8

2.8

2.8

4.3

Units

mA

V/ns

V/ns

v6.0

1-19

Share Link: