GT28F400B3B150 Ver la hoja de datos (PDF) - Intel

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GT28F400B3B150

SMART 3 ADVANCED BOOT BLOCK WORD-WIDE 4-MBIT (256K X 16), 8-MBIT (512K X 16), 16-MBIT (1024K X 16) FLASH MEMORY FAMILY

Intel 

SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE

E

Command

Read Array

Intelligent Identifier

Read Status Register

Clear Status Register

Write (Program)

Alternate Write (Program)

Block Erase/Confirm

Program/Erase Suspend

Program/Erase Resume

Table 6. Command Bus Definitions

Notes

First Bus Cycle

Oper Addr

Data

5

Write

X

FFH

2,3.5 Write

X

90H

5

Write

X

70H

5

Write

X

50H

4,5 Write

X

40H

4,5 Write

X

10H

5

Write

X

20H

5

Write

X

B0H

5

Write

X

D0H

Second Bus Cycle

Oper

Addr

Data

Read

IA

ID

Read

X

SRD

Write

PA

PD

Write

PA

PD

Write

BA

D0H

ADDRESS

DATA

BA = Block Address

IA = Identifier Address

PA = Program Address

X = Don’t Care

SRD = Status Register Data

ID = Identifier Data

PD = Program Data

NOTES:

1. Bus operations are defined in Table 3.

2. A0 = 0 for manufacturer code, A0 = 1 for device code.

3. Following the Intelligent Identifier command, two read operations access manufacturer and device codes.

4. Either 40H or 10H command is valid.

5. When writing commands to the device, the upper data bus [DQ8–DQ15] should be either VIL or VIH, to minimize current

draw.

20

PRELIMINARY

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