DS80C400 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS80C400

Network Microcontroller

Dallas Semiconductor -> Maxim Integrated 

DS80C400

PIN

NAME

FUNCTION

P1.0–P1.7

Port 1, I/O. Port 1 can function as either an 8-bit, bidirectional I/O port or as an alternate interface

for internal resources. The reset condition of Port 1 is all bits at logic 1 through a weak pullup. The

logic 1 state also serves as an input mode, since external circuits writing to the port can overdrive

the weak pullup. When software clears any port pin to 0, a strong pulldown is activated that

remains on until either a 1 is written to the port pin or a reset occurs. Writing a 1 after the port has

been at 0 activates a strong transition driver, followed by a weaker sustaining pullup. Once the

momentary strong driver turns off, the port once again becomes the output (and input) high state.

Port Alternate Function

89

P1.0 T2 External I/O for Timer/Counter 2

90

P1.1 T2EX Timer/Counter 2 Capture/Reload Trigger

91

P1.2 RXD1 Serial Port 1 Receive

92

P1.3 TXD1 Serial Port 1 Transmit

93

P1.4 INT2 External Interrupt 2 (Positive Edge Detect)

94

P1.5 INT3 External Interrupt 3 (Negative Edge Detect)

95

P1.6 INT4 External Interrupt 4 (Positive Edge Detect)

96

P1.7 INT5 External Interrupt 5 (Negative Edge Detect)

A15–A8 (Port 2), Output. Port 2 serves as the MSB for external addressing. The port automatically

asserts the address MSB during external ROM and RAM access. Although the Port 2 SFR exists,

the SFR value never appears on the pins (due to memory access). Therefore, accessing the Port 2

SFR is only useful for MOVX A, @Ri or MOVX @Ri, A instructions, which use the Port 2 SFR

as the external address MSB.

Port Alternate Function

66

A8

P2.0 A8 Program/Data Memory Address 8

65

A9

P2.1 A9 Program/Data Memory Address 9

64

A10 P2.2 A10 Program/Data Memory Address 10

61

A11 P2.3 A11 Program/Data Memory Address 11

60

A12 P2.4 A12 Program/Data Memory Address 12

59

A13 P2.5 A13 Program/Data Memory Address 13

58

A14 P2.6 A14 Program/Data Memory Address 14

57

A15 P2.7 A15 Program/Data Memory Address 15

P3.0–P3.7

Port 3, I/O. Port 3 functions as an 8-bit, bidirectional I/O port, and as an alternate interface for

several resources found on the traditional 8051. The reset condition of Port 3 is all bits at logic 1

through a weak pullup. The logic 1 state also serves as an input mode, since external circuits

writing to the port can overdrive the weak pullup. When software clears any port pin to 0, the

device activates a strong pulldown that remains on until either a 1 is written to the port pin or a

reset occurs. Writing a 1 after the port has been at 0 activates a strong transition driver, followed

by a weaker sustaining pullup. Once the momentary strong driver turns off, the port once again

becomes the output (and input) high state.

Port Alternate Function

20

P3.0 RXD0 Serial Port 0 Receive

21

P3.1 TXD0 Serial Port 0 Transmit

22

P3.2 INT0 External Interrupt 0

23

P3.3 INT1 External Interrupt 1

24

P3.4 T0 Timer 0 External Input

25

P3.5 T1/CLKO Timer 1 External Input/External Clock Output

26

P3.6 WR External Data Memory Write Strobe

27

P3.7 RD External Data Memory Read Strobe

5 of 125

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