1EDI2004AS Ver la hoja de datos (PDF) - Infineon Technologies

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Fabricante

1EDI2004AS

High Voltage IGBT Driver for Automotive Applications

Infineon Technologies 

EiceDRIVERTM SIL

1EDI2004AS

Functional Description

2.4.3 PWM Input Stage

The PWM input stage generates from the external signals INP, INSTP and EN the turn-on and turn-off

commands to the secondary side. The general structure of the PWM input block is shown Figure 3.

VCC1

INP

INSTP

EN

inhibit _a c t.

en_valid

pwm_cmd

Figure 3

REF0

PWM Input Stage

Signals INP, INSTP and EN are pseudo-differential, in the sense that they are not referenced to the common

ground GND1 but to signal REF0. This is intended to make the device more robust against ground bouncing

effects.

Note:

1. Glitches shorter than tINPS1 (see Table 45) occurring at signal INP are filtered internally.

2. Pulses at INP below tINPPD (see Table 45) might be distorted or suppressed.

The 1EDI2004AS supports non-inverted PWM signals only. When a High level on pin INP is detected while

signals INSTP and EN are valid, a turn-on command is issued to the secondary chip. A Low level at pin INP

issues a turn-off command to the secondary chip.

Signal EN can inhibit turn-on commands received at pin INP. A valid signal EN is required in order to have turn-

on commands issued to the secondary chip. If an invalid signal is provided, the PWM input stage issues

constantly turn-off commands to the secondary chip. The functionality of signal EN is detailed in

Chapter 2.4.8.

Note:

After an invalid-to valid-transition of signal EN, a minimum delay of tINPEN should be inserted before

turning INP on.

As shown in Figure 4, signal INSTP provides a Shoot-Through Protection (STP) to the system. When signal at

pin INSTP is at High level, the internal signal inhibit_act is activated. The inhibition time is defined as the

pulse duration of signal inhibit_act. It corresponds to the pulse duration of signal INSTP to which a minimum

dead time is added. During the inhibition time, rising edges of signal INP are inhibited. Bit PSTAT2.STP is set

for the duration of the inhibition time.

Data Sheet

19

Rev. 2.0

2019-01-16

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