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Fabricante

1EDI2004AS

High Voltage IGBT Driver for Automotive Applications

Infineon Technologies 

EiceDRIVERTM SIL

1EDI2004AS

Functional Description

2.2.2 Pin Functionality

2.2.2.1 Primary Side

GND1

Ground connection for the primary side.

VCC1

5V power supply for the primary side (referring to GND1).

INP

Non-inverting PWM input of the driver. The internal structure of the pad makes the IC robust against glitches.

An internal weak pull-down resistor to VREF0 drives this input to Low state in case the pin is floating.

INSTP

Monitoring PWM input for shoot through protection. The internal structure of the pad makes the IC robust

against glitches. An internal weak pull-down resistor to VREF0 drives this input to Low state in case the pin is

floating.

REF0

Reference Ground signal for the signals INP, INSTP, EN. This pin should be connected to the ground signal of

the logic issuing those signals.

EN

Enable Input Signal. This signal allows the logic on the primary side to turn-off and deactivate the device. An

internal weak pull-down resistor to VREF0 drives this input to Low state in case the pin is floating. This pin reacts

on logic levels.

NFLTA

Open-Drain Output signal used to report major failure events (Event Class A). In case of an error event, NFLTA

is driven to Low state. This pin shall be connected externally to VCC1 with a pull-up resistance.

NFLTB

Open-Drain Output signal used to report major failure events (Event Class B) and reset events. In case of an

error event, NFLTB is driven to Low state. This pin shall be connected externally to VCC1 with a pull-up

resistance.

SCLK

Serial Clock Input for the SPI interface. An internal weak pull-up device to VCC1 drives this input to high state in

case the pin is floating.

SDO

Serial Data Output (push-pull) for the SPI interface.

Data Sheet

13

Rev. 2.0

2019-01-16

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