CXP402 Ver la hoja de datos (PDF) - Sony Semiconductor

Número de pieza

componentes Descripción

Fabricante

CXP402

CMOS 4-bit Single Chip Microcomputer

Sony Semiconductor 

CXP402

Symbol

VDD

VSS

AVDD

AVSS

XVDD

XVSS

TEST1

TEST0

DTEST

CTEST

I/O

Input

Input

Input

Input

Description

Positive power supply.

GND.

Positive power supply for analog circuit.

GND for analog circuit.

Positive power supply for oscillation circuit.

GND for oscillation circuit.

Test for LSI.

Connect to GND for normal operation.

Notes

• Power supply pins AVDD, AVss, XVDD, XVss, VDD and Vss should process all the pins.

• PCMD is the MSB first, two's complement output.

• GTOP is used to monitor the frame sync protection status. (High: sync protection window open.)

• XUGF is the frame sync obtained from the EFM signal, and is negative pulse. It is the signal before sync

protection.

• XPLCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the EFM signal

transition point coincide.

• The GFS signal goes high when the frame sync and the insertion timing match.

• RFCK is derived from the crystal accuracy, and has a cycle of 136µs (at normal speed).

• C2PO represents the data error status.

• XRAOF is generated when the 16K RAM exceeds the ±4F jitter margin.

–6–

Share Link: