PSD853F5VA-70JIT Ver la hoja de datos (PDF) - STMicroelectronics
Número de pieza
componentes Descripción
Fabricante
PSD853F5VA-70JIT Datasheet PDF : 128 Pages
| |||
PSD8XXFX
Pin description
Table 3. PLCC52 pin description (1) (continued)
Pin name Pin Type
Description
PC3 pin of port C. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
CPLD macrocell (McellBC3) output.
PC3
17 I/O Input to the PLDs.
TSTAT output(2) for the JTAG Serial Interface.
Ready/Busy output for parallel in-system programming (ISP).
This pin can be configured as a CMOS or Open Drain output.
PC4 pin of port C. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
CPLD macrocell (McellBC4) output.
) PC4
14 I/O
t(s Input to the PLDs.
TERR output(2) for the JTAG Serial Interface.
c This pin can be configured as a CMOS or Open Drain output.
du PC5 pin of port C. This port pin can be configured to have the following functions:
ro MCU I/O – write to or read from a standard output or input port.
P CPLD macrocell (McellBC5) output.
PC5
13 I/O
te Input to the PLDs.
le TDI input(2) for the JTAG Serial Interface.
o This pin can be configured as a CMOS or Open Drain output.
bs PC6 pin of port C. This port pin can be configured to have the following functions:
O MCU I/O – write to or read from a standard output or input port.
- CPLD macrocell (McellBC6) output.
) PC6
12 I/O
Input to the PLDs.
t(s TDO output(2) for the JTAG Serial Interface.
c This pin can be configured as a CMOS or Open Drain output.
du PC7 pin of port C. This port pin can be configured to have the following functions:
roMCU I/O – write to or read from a standard output or input port.
P CPLD macrocell (McellBC7) output.
PC7
11 I/O
te Input to the PLDs.
DBE – active low Data Byte Enable input from 68HC912 type MCUs.
le This pin can be configured as a CMOS or Open Drain output.
so PD0 pin of port D. This port pin can be configured to have the following functions:
Ob ALE/AS input latches address output from the MCU.
PD0
10 I/O MCU I/O – write or read from a standard output or input port.
Input to the PLDs.
CPLD output (External Chip Select).
PD1 pin of port D. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
PD1
9
I/O Input to the PLDs.
CPLD output (External Chip Select).
CLKIN – clock input to the CPLD macrocells, the APD Unit’s Power-down counter, and
the CPLD AND Array.
Doc ID 7833 Rev 7
17/128
Share Link: 