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ISP1583 Datasheet PDF : 100 Pages
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NXP Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Table 5. Bus configuration modes
Pin
PIO width
BUS_CONF/
DA0
DMA width
WIDTH = 0
LOW
AD[7:0]
D[7:0]
HIGH
A[7:0] and
D[15:0]
D[7:0]
WIDTH = 1
D[15:0]
D[15:0]
Description
split bus mode:
• Multiplexed address and data on pins AD[7:0]
• Separate 8-bit or 16-bit DMA bus on pins DATA[15:0]
generic processor mode:
• Separate 8-bit address on pins AD[7:0]
• 16-bit data (PIO and DMA) on pins DATA[15:0]
8.12 Pins status
Table 6 illustrates the behavior of ISP1583 pins with VCC(I/O) and VCC(3V3) in various
operating conditions.
Table 6.
VCC(3V3)
ISP1583 pin status
VCC(I/O)
State
0V
0V
0V
1.65 V to 3.6 V
0 V → 3.3 V 1.65 V to 3.6 V
3.3 V
1.65 V to 3.6 V
dead[1]
plug-out[2]
plug-in[3]
reset
3.3 V
1.65 V to 3.6 V after reset
Pin
Input
unknown
high-Z
high-Z
state depends on how
the pin is driven
state depends on how
the pin is driven
Output
unknown
unknown
unknown
output
output
I/O
unknown
high-Z
high-Z
high-Z
state depends on how the
pin is configured
[1] Dead: the USB cable is plugged out, and VCC(I/O) is not available.
[2] Plug-out: the USB cable is not present, but VCC(I/O) is available.
[3] Plug-in: the USB cable is being plugged in, and VCC(I/O) is available.
Table 7 illustrates the behavior of output pins with VCC(I/O) and VCC(3V3) in various
operating conditions.
Table 7. ISP1583 output pin status
VCC(3V3)
0V
VCC(I/O)
0V
0V
1.65 V to 3.6 V
0 V → 3.3 V 1.65 V to 3.6 V
3.3 V
1.65 V to 3.6 V
3.3 V
1.65 V to 3.6 V
State
dead[1]
plug-out[2]
plug-in[3]
reset
after reset
INT
LOW
LOW
LOW
HIGH
HIGH
[1] Dead: the USB cable is plugged out, and VCC(I/O) is not available.
[2] Plug-out: the USB cable is not present, but VCC(I/O) is available.
[3] Plug-in: the USB cable is being plugged in, and VCC(I/O) is available.
SUSPEND
HIGH
HIGH
HIGH
LOW
LOW
ISP1583_7
Product data sheet
Rev. 07 — 22 September 2008
© NXP B.V. 2008. All rights reserved.
17 of 99
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