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MCC141537 Ver la hoja de datos (PDF) - Motorola => Freescale

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componentes Descripción
Fabricante
MCC141537
Motorola
Motorola => Freescale Motorola
MCC141537 Datasheet PDF : 22 Pages
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LCD Drive Voltage Generator
This module generates the LCD voltages needed for display output.
This section should take a single supply input and generate necessary
bias voltage.
It consists of :
1. Voltage Doubler and Voltage Tripler
To generate the Vcc voltage. Doubler is used for LCD panel which
needs lower driving voltage for less power consumption. Tripler is
used for LCD panel which needs higher driving voltage.
2. Voltage Regulator
Feedback gain control for initial LCD display voltage. One can also
use it as an external contrast control.
3. Voltage Divider
Divide the LCD display voltage (VLL2-VLL6) from the regulator out-
put. This is a low power consumption circuit which consumes very
little ILCD current compare with traditional resistor ladder method.
4. Self adjust temperature compensation circuitry
Provide 4 different compensation grade selections to satisfy the
various liquid crystal temperature grades. This temperature coeffi-
cients can be selected by software control.
5. Contrast Control Block
Software control of 16 voltage levels of LCD display voltage.
All blocks can be individually turned off if external voltage generator
is provided.
16 Bit Latch / 120 Bit Latch
A 136 bit long register which carries the display signal information.
First 16 bits are Common driving signals and other 120 bits are Seg-
ment driving signals. Data will be input to the Level Shifter for bumping
up to the required level.
Level Selector
Level selector is a control of the display synchronization. Display volt-
age can be separated into two sets and used with different cycle. Syn-
chronization is important since it selects the required LCD voltage level
to the HV Buffer Cell for output signal voltage pump.
HV Buffer Cell (Level Shifter)
HV buffer cell works as a level shifter which translates the low voltage
output signal to the required driving voltage. The output is shifted out
with a internal FRM clock which comes from the Display Timing Gener-
ator. The voltage levels are determined by the level selector which is
synchronized with the internal M signal.
LCD Panel Driving Waveform
This is an example of how the Common and Segment drivers may
be connected to a LCD panel. The waveform shown in figure 7a, 7b and
7c illustrates the desired multiplex scheme.
Com0
Com1
Com2
Com3
Com4
Com5
Com6
Com7
Figure 7a. LCD Display Waveform
MC141537
3-110
MOTOROLA

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