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CY7C65213-28PVXI

USB-UART LP Bridge Controller

Cypress Semiconductor 

CY7C65213

CY7C65213A

application reduces device data backlog. After it reaches the

75% watermark level, the RTS# signal is asserted to resume

data reception.

■ DSR# (Input) / DTR# (Output)

The DSR#/DTR# signals are used to establish a communication

link with the UART. These signals complement each other in their

functionality, similar to CTS# and RTS#.

GPIO Interface

CY7C65213/CY7C65213A has eight GPIOs. The configuration

utility lets you configure the GPIO pins. The configurable options

are as follows:

■ TRISTATE: GPIO tristated

■ DRIVE 1: Output static 1

■ DRIVE 0: Output static 0

■ POWER#: Power control for bus power designs

■ TXLED#: Drives LED during USB transmit

■ RXLED#: Drives LED during USB receive

■ TX or RX LED#: Drives LED during USB transmit or receive.

GPIO can be configured to drive LED at 8-mA drive strength.

■ SLEEP#: Indicates USB suspend

■ BCD0/1: Two-pin output to indicate the type of USB charger

■ BUSDETECT: Connects VBUS pin for USB host detection

Memory

CY7C65213/CY7C65213A has a 512-byte flash. Flash is used

to store USB parameters, such as VID/PID, serial number, and

Product and Manufacturer Descriptors, which can be

programmed by the configuration utility.

System Resources

Power System

CY7C65213/CY7C65213A supports the USB Suspend mode to

control power usage. CY7C65213/CY7C65213A operates in

bus-powered or self-powered modes over a range of 3.15 V to

5.5 V.

Clock System

CY7C65213/CY7C65213A has a fully integrated clock and does

not require any external crystal. The clock system is responsible

for providing clocks to all subsystems.

Internal 48-MHz Oscillator

The internal 48-MHz oscillator is the primary source of internal

clocking in the CY7C65213/CY7C65213A device.

Internal 32-kHz Oscillator

The internal 32-kHz oscillator is the primary source of internal

clocking in CY7C65213/CY7C65213A.

Reset

The reset block ensures reliable power-on reset and brings the

device back to the default known state. The RESET# (active low)

pin can be used by external devices to reset the

CY7C65213/CY7C65213A.

Suspend and Resume

The CY7C65213/CY7C65213A device asserts the SLEEP# pin

when the USB bus goes into the suspend state. This helps to

meet the stringent suspend current requirements of the USB 2.0

specification, while using the device in bus-powered mode. The

device resumes from the suspend state under either of the

following two conditions:

1. Any activity is detected on the USB bus

2. The RI# (configured as wakeup) pin is asserted to generate

remote wakeup to the host.

WAKEUP

The RI# (configured as wakeup) pin is used to generate the

remote wakeup signal on the USB bus. The remote wakeup

signal is sent only if the host enables this feature through the

SET_FEATURE request. The device communicates support for

the remote wakeup to the host through the configuration

descriptor during the USB enumeration process. The

CY7C65213 device allows enabling/disabling of the remote

wakeup feature through the configuration utility.

Software

Cypress delivers a complete set of software drivers and a

configuration utility to enable product configuration during

system development.

Drivers for Linux Operating Systems

Cypress provides a User Mode USB driver library

(libcyusbserial.so) that abstracts vendor commands for the

UART interface and provides a simplified API interface for user

applications. This library uses the standard open-source libUSB

library to enable USB communication. The Cypress serial library

supports the USB plug-and-play feature using the Linux ‘udev’

mechanism.

CY7C65213/CY7C65213A supports the standard USB CDC

UART-class driver, which is bundled with the Linux kernel.

Android Support

The CY7C65213/CY7C65213A solution also includes an

Android Java class–CyUsbSerial.java–which exposes a set of

interface functions to communicate with the device.

Drivers for Mac OSx

Cypress delivers a dynamically linked shared library

(CyUSBSerial.dylib) based on libUSB, which enables

communication to the CY7C65213/CY7C65213A device.

In addition, the device also supports the native Mac OSx CDC

UART-class driver.

Document Number: 001-81011 Rev. *M

Page 5 of 29

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