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XWM8721EDS Ver la hoja de datos (PDF) - Wolfson Microelectronics plc

Número de pieza
componentes Descripción
Fabricante
XWM8721EDS
Wolfson
Wolfson Microelectronics plc Wolfson
XWM8721EDS Datasheet PDF : 37 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Production Data
DIGITAL AUDIO INTERFACE – SLAVE MODE
tBCH
tBCL
BCLK
tBCY
DACLRC
DACDAT
tDS
tLRH
tLRSU
tDH
WM8721 / WM8721L
Figure 3 Digital Audio Data Timing – Slave Mode
Test Conditions
AVDD, HPVDD, DVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25oC, slave mode, fs = 48kHz, MCLK = 256fs
unless otherwise stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
BCLK cycle time
tBCY
BCLK pulse width high
tBCH
BCLK pulse width low
tBCL
DACLRC set-up time to
BCLK rising edge
tLRSU
DACLRC hold time from
tLRH
BCLK rising edge
DACDAT set-up time to
tDS
BCLK rising edge
DACDAT hold time from
tDH
BCLK rising edge
TEST CONDITIONS
MIN
TYP
MAX
UNIT
50
ns
20
ns
20
ns
10
ns
10
ns
10
ns
10
ns
MPU INTERFACE TIMING
CSB
SCLK
tCSL
tSCY
tSCH
tSCL
SDIN
tDSU
tDHO
Figure 4 Program Register Input Timing - 3-Wire MPU Interface Timing
w
tCSH
tSCS
tCSS
LSB
PD Rev 4.0 November 2004
9

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