XWM8721EDS Ver la hoja de datos (PDF) - Wolfson Microelectronics plc
Número de pieza
componentes Descripción
Fabricante
XWM8721EDS Datasheet PDF : 37 Pages
| |||
WM8721 / WM8721L
Production Data
Test Conditions
AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK =
256fs unless otherwise stated.
PARAMETER
SYMBOL
Program Register Input Information
SCLK rising edge to CSB rising
tSCS
edge
SCLK pulse cycle time
tSCY
SCLK pulse width low
tSCL
SCLK pulse width high
tSCH
SDIN to SCLK set-up time
tDSU
SCLK to SDIN hold time
tDHO
CSB pulse width low
tCSL
CSB pulse width high
tCSH
CSB rising to SCLK rising
tCSS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
60
ns
80
ns
20
ns
20
ns
20
ns
20
ns
20
ns
20
ns
20
ns
t3
t5
t3
SDIN
t4
t6
t2
t8
SCLK
t1
t7
t10
Figure 5 Program Register Input Timing – 2-Wire MPU Interface Timing
Test Conditions
AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK =
256fs unless otherwise stated.
PARAMETER
SYMBOL
Program Register Input Information
SCLK Frequency
SCLK Low Pulsewidth
t1
SCLK High Pulsewidth
t2
Hold Time (Start Condition)
t3
Setup Time (Start Condition)
t4
Data Setup Time
t5
SDIN, SCLK Rise Time
t6
SDIN, SCLK Fall Time
t7
Setup Time (Stop Condition)
t8
Data Hold Time
t10
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0
400
kHz
600
ns
1.3
us
600
ns
600
ns
100
ns
300
ns
300
ns
600
ns
900
ns
w
PD Rev 4.0 November 2004
10
Share Link: 