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WED9LC6816V Ver la hoja de datos (PDF) - White Electronic Designs Corporation

Número de pieza
componentes Descripción
Fabricante
WED9LC6816V
WEDC
White Electronic Designs Corporation WEDC
WED9LC6816V Datasheet PDF : 27 Pages
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White Electronic Designs
WED9LC6816V
FIG. 10 SDRAM PAGE WRITE CYCLE AT DIFFERENT BANK @
BURST LENGTH = 4
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19
SDCK
SDCE#
SDRAS#
SDCAS#
ADDR
RAa
CAa RBb
CBb
CAc
CBb
Note 2
BA0, 1
[A12,A13]
SDA10
RAa
DQ
RBb
tCDL
tRDL
DAa0 DAa1 DAa2 DAa3 DBb0 DBb1 DBb2 DBb3 DAc0 DAc1 DBd0 DBd1
SDWE#
BWE#
Row Active
(A-Bank)
Row Active
(A-Bank)
Write
(A-Bank)
Write
(B-Bank)
Note 1
Write
(A-Bank)
Write
(B-Bank)
Precharge
(Both Banks)
DON’T CARE
NOTES:
1. To interrupt burst write by Row precharge, BWE# should be asserted to mask invalid input data.
2. To interrupt a burst read by Row precharge, both the read and the precharge banks must be the same.
Contact factory for ordering information.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
September, 2003
Rev. 1
19
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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