WED9LC6816V Ver la hoja de datos (PDF) - White Electronic Designs Corporation

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componentes Descripción

Fabricante

WED9LC6816V

256Kx32 SSRAM/4Mx32 SDRAM

White Electronic Designs Corporation 

White Electronic Designs

WED9LC6816V

FIG. 12 SDRAM READ & WRITE CYCLE WITH AUTO PRECHARGE @

BURST LENGTH = 4

0

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19

SDCK

SDCE#

SDRAS#

SDCAS#

ADDR

Ra

BA0, 1

[A12,A13]

SDA10

Ra

CL=2

DQ

CL=3

Rb Ca

Cb

Rb

Qa0 Qa1 Qa2 Qa3

Qa0 Qa1 Qa2 Qa3

Db0 Db1 Db2 Db3

Db0 Db1 Db2 Db3

SDWE#

BWE#

Row Active

(A-Bank)

Read with

Auto Precharge

(A-Bank)

Row Active

(B-Bank)

Auto Precharge

Start Point

(A-Bank)

Write with

Auto Precharge

(B-Bank)

Auto Precharge

Start Point

(B-Bank)

DON’T CARE

NOTES:

1. tCDL should be controlled to meet minimum tRAS before internal precharge start.

(In the case of Burst Length = 1 & 2 and BRSW mode)

Contact factory for ordering information.

White Electronic Designs Corp. reserves the right to change products or specifications without notice.

September, 2003

Rev. 1

21

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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