MX29L1611 Ver la hoja de datos (PDF) - Macronix International
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MX29L1611 Datasheet PDF : 34 Pages
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MX29L1611G / MX29L1611*
READ/RESET COMMAND
The read or reset operation is initiated by writing the read/
reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the
memory. The device remains enabled for reads until the
CIR contents are altered by a valid command sequence.
The device will automatically power-up in the read/reset
state. In this case, a command sequence is not required
for "read operation". Standard microprocessor read
cycles will retrieve array data. This default value ensures
that no spurious alteration of the memory content occurs
during the power transition. Refer to the AC Read
Characteristics and Waveforms for the specific timing
parameters.
The MX29L1611G is accessed like an EPROM. When
CE and OE are low the data stored at the memory location
determined by the address pins is asserted on the
outputs. The outputs are put in the high impedance state
whenever CE or OE is high. This dual line control gives
designers flexibility in preventing bus contention.
Note that the read/reset command is not valid when
program or erase is in progress.
PAGE READ
The MX29L1611G offers "fast page mode read" function.
The users can take the access time advantage if keeping
CE, OE at low and the same page address (A3~A19
unchanged). Please refer to Figure 5-2 for detailed timing
waveform. The system performance could be enhanced
by initiating 1 normal read and 7 fast page reads(for word
mode A0~A2) or 15 fast page reads(for byte mode
altering A-1~A2).
PAGE PROGRAM
The device is set up in the programming mode when
VPP=11V is applied OE=VIH.
To initiate Page program mode, a three-cycle command
sequence is required. There are two "unlock" write
cycles. These are followed by writing the page program
command-A0H.
Any attempt to write to the device without the three-cycle
command sequence will not start the internal Write State
Machine(WSM), no data will be written to the device.
After three-cycle command sequence is given, a
byte(word) load is performed by applying a low pulse on
the CE input with CE low and OE high. The address is
latched on the falling edge of CE. The data is latched by
the first rising edge of CE. Maximum of 64 words of data
may be loaded into each page by the same procedure as
outlined in the page program section below.
PROGRAM
Any page to be programmed should have the page in the
erased state first, i.e. performing sector erase is suggested
before page programming can be performed.
The device is programmed on a page basis. If a word of
data within a page is to be changed, data for the entire
page can be loaded into the device. Any word that is not
loaded during the programming of its page will be still in
the erased state (i.e. FFH). Once the words of a page
are loaded into the device, they are simultaneously
programmed during the internal programming period.
After the first data word has been loaded into the device,
successive words are entered in the same manner. Each
new word to be programmed must have its high to low
transition on CE within 30us of the low to high transition
of CE of the preceding word. A6 to A19 specify the page
address, i.e., the device is page-aligned on 64 words
boundary. The page address must be valid during each
high to low transition of CE. A0 to A5 specify the word
address withih the page. The word may be loaded in any
order; sequential loading is not required. If a high to low
transition of CE is not detected whithin 100us of the last
low to high transition, the load period will end and the
internal programming period will start. The Auto page
program terminates when status on Q7 is '1' at which time
the device stays at read status register mode until the
CIR contents are altered by a valid command
sequence.(Refer to table 3,6 and Figure 1,7,8)
CHIP ERASE
The device is set up in the erase mode when VPP=11V
is applied OE=VIH.
Chip erase is a six-bus cycle operation. There are two
"unlock" write cycles. These are followed by writing the
P/N:PM0604
REV. 0.8, JAN. 24, 2002
9
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