MX28F1000P Ver la hoja de datos (PDF) - Macronix International

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MX28F1000P

1M-BIT [128K x 8] CMOS FLASH MEMORY

Macronix International 

MX28F1000P

AUTOMATIC CHIP ERASE TIMING WAVEFORM

All data in chip are erased. External erase verify is not

required because data is erased automatically by internal

control circuit. Erasure completion can be verified by

DATA polling and toggle bit checking after automatic

erase starts. Device outputs 0 during erasure and 1 after

erasure on Q7. Q0 to Q5 (Q6 is for toggle bit; see toggle

bit, DATA polling, timing waveform) are in high imped-

ance.

Vcc 5V

12V

Vpp

0V

A0 ~ A16

WE

CE

OE

Q7

Q0~Q5

Setup auto chip erase/

erase command

Auto chip erase & DATA polling

tVPS

tVPH

tOES

tCWC

tAETC

tCEP tCEPH1 tCEP tCESP tCES

tDS tDH

Command in

tDS tDH

Command in

tDPA

Command in Command in

DATA polling

Command #30H Command #30H

tCESC

tDF

P/N: PM0340

REV. 1.6, JAN. 19, 1999

18

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