µ PD63335
1.6.11 Data format of FSDF2:FSDF1:FSDF0:LRCLKS = 1:0:0:0
• CLKIOS = “0”: Input of both BIT_CLK and LRCLK
• CLKIOS = “1”: Output of both BIT_CLKNote and LRCLK
• BIT_CLK: 48 fS
• Data I/O occurs via the L channel while LRCLK is at high level and occurs via the R channel while LRCLK is at low
level.
• SI and SO have left-justified data input and output.
Note The duty factor of output BIT_CLK is not 50%.
BIT_CLK
48 fs
LRCLK
SI
L15 L14 L13 L12 L11
L4 L3 L2 L1 L0
Left channel data
SO
L15 L14 L13 L12 L11
L4 L3 L2 L1 L0
Left channel data
R15 R14 R13 R12 R11
R4 R3 R2 R1 R0
Right channel data
R15 R14 R13 R12 R11
R4 R3 R2 R1 R0
Right channel data
1.6.12 Data format of FSDF2:FSDF1:FSDF0:LRCLKS = 1:0:0:1
• CLKIOS = “0”: Input of both BIT_CLK and LRCLK
• CLKIOS = “1”: Output of both BIT_CLKNote and LRCLK
• BIT_CLK: 48 fS
• Data I/O occurs via the R channel while LRCLK is at high level and occurs via the L channel while LRCLK is at low
level.
• SI and SO have left-justified data input and output.
Note The duty factor of output BIT_CLK is not 50%.
BIT_CLK
48 fs
LRCLK
SI
L15 L14 L13 L12 L11
L4 L3 L2 L1 L0
Left channel data
SO
L15 L14 L13 L12 L11
L4 L3 L2 L1 L0
Left channel data
R15 R14 R13 R12 R11
R4 R3 R2 R1 R0
Right channel data
R15 R14 R13 R12 R11
R4 R3 R2 R1 R0
Right channel data
20
Data Sheet S15003EJ6V0DS