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STPIC44L02 Ver la hoja de datos (PDF) - STMicroelectronics

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STPIC44L02 Datasheet PDF : 21 Pages
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STPIC44L02
PIN DESCRIPTION
PIN No SYMBOL
1
FLT
2 VCOMPEN
3
VCOMP
4
IN0
5
IN1
6
IN2
7
IN3
8
CS
9
SDO
10
SDI
11
SCLK
12
VCC
13
GND
14
DRAIN0
16
DRAIN1
19
DRAIN2
21
DRAIN3
15
GATE0
17
GATE1
18
GATE2
20
GATE3
22
RESET
23
NC
24
VBAT
I/O
NAME AND FUNCTION
I Fault Flag. FLT is a logic level open-drain output that provides a real time fault flag for
shorted-load, open-load, over-battery voltage, under-battery voltage faults. The
device can be ORed with FLT terminals on other devices for interrupt handling. FLT
requires an external pull-up resistor.
I Fault reference voltage select. VCOMPEN selects the internally generated fault
reference voltage (0) or an external fault reference (1) to be used in the shorted and
open load fault detection circuitry.
I Fault reference voltage. VCOMP provides an external fault reference voltage for the
shorted-load and open load fault detection circuitry.
I Parallel gate driver. IN0 trough In3 are real-time controls for the gate pre drive
circuitry. They are CMOS compatible with hysteresis.
I Chip select. A high to low transition on CS enables SDO, latches fault data into the
serial interface, and refreshes FLT. When CS is high, the fault register can change
fault status. On the falling edge of CS, fault data is latched into the serial output
register and transferred using SDO and SCLK. On a low to high transition of CS,
serial data is latched in to the output control register.
O Serial data output. SDO is a 3-state output that transfers fault data to the controlling
device. It also passes serial input data to the next stage for cascaded operation. SDO
is taken to a high-impedance state when CS is in a high state.
I Serial data input. Output control data is clocked into the serial register through SDI. A
1 on SDI commands a particular gate output on and a 0 turns it off.
I Serial clock. SCLK clocks the shift register. Serial data is clocked into SDI and serial
fault data is clocked out of SDO on the falling edge of the serial clock.
I Logic Supply Voltage
I Ground
I FET drain inputs. DRAIN0 through DRAIN3 are used for both open load and short
circuit fault detection at the drain of the external FETs. They are also used for
inductive transient protection.
O Gate drive output. GATE0 through GATE3 outputs are derived from the VBAT supply
voltage. Internal clamps prevent voltages on these nodes from exceeding the VGS
rating of most FETs.
I Reset. A high-to low transition of RESET clears all registers and flags. Gate outputs
turn off and the FLT flag is cleared.
Not Connected
I Battery Supply Voltage
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