SST39VF800Q-90-4C-UK Ver la hoja de datos (PDF) - Silicon Storage Technology

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componentes Descripción

Fabricante

SST39VF800Q-90-4C-UK

8 Megabit (512K x 16-Bit) Multi-Purpose Flash

Silicon Storage Technology 

8 Megabit Multi-Purpose Flash

SST39VF800Q / SST39VF800

Advance Information

TABLE 2: PIN DESCRIPTION

Symbol

Pin Name

A18-A0

Address Inputs

DQ15-DQ0 Data Input/output

CE#

OE#

WE#

VDD

VDDQ

Chip Enable

Output Enable

Write Enable

Power Supply

I/O Power Supply

Vss

Ground

NC

No Connection

Functions

To provide memory addresses. During sector erase A18-A11 address lines

1

will select the sector. During block erase A18-A15 address lines will select

the block.

To output data during read cycles and receive input data during write

2

cycles. Data is internally latched during a write cycle. The outputs are in

tri-state when OE# or CE# is high.

To activate the device when CE# is low.

3

To gate the data output buffers.

To control the write operations.

To provide 3-volt supply (2.7-3.6V)

4

Supplies power for input/output buffers. It should be either tied to VDD

(2.7 - 3.6V) for 3V I/O or to a 5.0V (4.5 - 5.5V) power supply to

support 5V I/O. (Not offered on SST39VF800 device, instead it is a NC)

5

Unconnected pins.

6

343 PGM T2.0

TABLE 3: OPERATION MODES SELECTION

Mode

CE# OE#

WE#

A9 DQ

7

Address

Read

VIL

VIL

VIH

AIN DOUT

AIN

Program

VIL

VIH

VIL

AIN DIN

AIN

8

Erase

Standby

VIL

VIH

VIL

VIH

X

X

XX

X High Z

Sector or block address,

XXh for chip erase

X

9

Write Inhibit

X

VIL

X

X High Z/ DOUT

X

X

X

VIH

X High Z/ DOUT

X

10

Product Identification

Hardware Mode

Software Mode

VIL

VIL

VIH

VH Manufacturer Code (00BF) A18 - A1 = VIL, A0 = VIL

VIL

VIL

VIH

Device Code (2781)

AIN

A18 - A1 = VIL, A0 = VIH

See Table 4

11

343 PGM T3.0

12

13

14

15

16

© 1999 Silicon Storage Technology, Inc.

5

343-04 2/99

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