M87C257-10C1X Ver la hoja de datos (PDF) - STMicroelectronics

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M87C257-10C1X

ADDRESS LATCHED 256K (32K x 8) UV EPROM and OTP EPROM

STMicroelectronics 

M87C257

Table 3. Operating Modes

Mode

E

G

Read (Latched Address)

VIL

VIL

Read (Applied Address)

VIL

VIL

Output Disable

VIL

VIH

Program

VIL Pulse

VIH

Verify

VIH

VIL

Program Inhibit

VIH

VIH

Standby

VIH

X

Electronic Signature

VIL

VIL

Note: X = VIH or VIL, VID = 12V ± 0.5V

A9

ASVPP

Q0 - Q7

X

VIL

Data Out

X

VIH

Data Out

X

X

Hi-Z

X

VPP

Data In

X

VPP

Data Out

X

VPP

Hi-Z

X

X

Hi-Z

VID

VIL

Codes

Table 4. Electronic Signature

Identifier

A0

Q7

Q6

Q5

Q4

Q3

Q2

Q1

Q0 Hex Data

Manufacturer’s Code VIL

0

0

1

0

0

0

0

0

20h

Device Code

VIH

1

0

0

0

0

0

0

0

80h

be used to gate data to the output pins, inde-

pendent of device selection. Assuming that the

addresses are stable (AS = VIH) or latched (AS =

VIL), the address access time (tAVQV) is equal to the

delay from E to output (tELQV). Data is available at

the output after delay of tGLQV from the falling edge

of G, assuming that E has been low and the ad-

dresses have been stable for at least tAVQV-tGLQV.

The M87C257 reduces the hardware interface in

multiplexed address-data bus systems. The proc-

essor multiplexed bus (AD0-AD7) may be tied to

the M87C257’s address and data pins. No sepa-

rate address latch is needed because the

M87C257 latches all address inputs when AS is

low.

Standby Mode

The M87C257 has a standby mode which reduces

the active current from 30mA to 100µA (Address

Stable). The M87C257 is placed in the standby

mode by applying a CMOS high signal to the E

input. When in the standby mode, the outputs are

in a high impedance state, independent of the G

input.

Two Line Output Control

Because EPROMs are usually used in larger mem-

ory arrays, this product features a 2 line control

function which accommodates the use of multiple

memory connection. The two line control function

allows:

a. the lowest possible memory power dissipation,

b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control lines,

E should be decoded and used as the primary

device selecting function, while G should be made

a common connection to all devices in the array

and connected to the READ line from the system

control bus. This ensures that all deselected mem-

ory devices are in their low power standby mode

and that the output pins are only active when data

is desired from a particular memory device.

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