M87C257-10C1X Ver la hoja de datos (PDF) - STMicroelectronics
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M87C257-10C1X Datasheet PDF : 13 Pages
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M87C257
Figure 6. Programming and Verify Modes AC Waveforms
A0-A14
Q0-Q7
ASVPP
VCC
E
G
tAVEL
DATA IN
tQVEL
tVPHEL
tVCHEL
tELEH
VALID
tEHQX
DATA OUT
tGLQV
tQXGL
tGHQZ
tGHAX
PROGRAM
VERIFY
AI00557
Figure 7. Programming Flowchart
VCC = 6.25V, VPP = 12.75V
n=0
NO
++n
= 25
YES
E = 100µs Pulse
NO
VERIFY
YES
++ Addr
FAIL
Last NO
Addr
YES
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
AI00760B
8/13
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows to pro-
gram the whole array with a guaranteed margin, in
a typical time of 3.5 seconds. Programming with
PRESTO II involves the application of a sequence
of 100µs program pulses to each byte until a correct
verify occurs (see Figure 7). During programming
and verify operation, a MARGIN MODE circuit is
automatically activated in order to guarantee that
each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides necessary margin to
each programmed cell.
Program Inhibit
Programming of multiple M87C257s in parallel with
different data is also easily accomplished. Except
for E, all like inputs including G of the parallel
M87C257 may be common. A TTL low level pulse
applied to a M87C257’s E input, with VPP at 12.75V,
will program that M87C257. A high level E input
inhibits the other M87C257s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correctly
programmed. The verify is accomplished with G at
VIL, E at VIH, VPP at 12.75V and VCC at 6.25V.
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