DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

S5L9274 Ver la hoja de datos (PDF) - Samsung

Número de pieza
componentes Descripción
Fabricante
S5L9274 Datasheet PDF : 36 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
DECODER FOR CD-MP3/CD-ROM
POWER MANAGEMENT
Power Save Modes
Down : Master Clock Disabled. Whole chip is in reset state and clocking is disabled.
(Host Interface ?, Clocks for CD-DSP chip ?)
Mode : All units suspended except hifUnit and DRAM Controller Block to refresh DRAM.
S5L9274
Running
Stop
Play
MP3
Power Down
Sleep
System Power ON
Power down mode
Power down mode is implemented using MLAT, MCK, and MDAT. When the MLAT is low the MDAT is goes to
low, the CD-MP3 goes to "power down reset" mode. It means power ON state. When the MLAT is low and the
MCK goes to LOW, the CD-MP3 the "power down mode". The default value of MLAT, MCK, and MDAT is HIGH.
the system power becomes ON and the master reset comes, Micom should set the of MLAT, MCK, and MDAT to
HIGH. And should reset the power down mode of -MP3 using MLAT and MDAT LOW. Finally should send the
S/W reset to CD-MP3 H_SOFT_RST (8'hE0) register.
Sleep mode
In sleep mode, the minimal power is supplied which is needed just for DRAM refresh, host command, and etc.
There is a register H_SLEEP_CR to control Sleep . To enter sleep mode write "1xxxxxxx" into the
H_SLEEP_CR. To wake up from mode write "0xxxxxxx" into the H_SLEEP_CR.
_SLEEP_CR
8'hdf
11

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]