S3C2440X Ver la hoja de datos (PDF) - Samsung

Número de pieza

componentes Descripción

Fabricante

S3C2440X

32-bit RISC microprocessor.

Samsung 

2003.10.15

S3C2440X RISC MICROPROCESSOR

ELECTRICAL DATA

Table 25-12. TFT LCD Controller Module Signal Timing Constants

(VDD = 1.8 V ± 0.15 V, TA = 0 to 70 °C, VEXT = 3.3V ± 0.3V)

Parameter

Symbol

Min

Typ

Vertical sync pulse width

Tvspw

VSPW + 1

–

Vertical back porch delay

Tvbpd

VBPD+1

–

Vertical front porch dealy

Tvfpd

VFPD+1

–

VCLK pulse width

Tvclk

1

–

VCLK pulse width high

Tvclkh

0.5

–

VCLK pulse width low

Tvclkl

0.5

–

Hsync setup to VCLK falling edge

Tl2csetup

0.5

–

VDEN set up to VCLK falling edge

Tde2csetup

0.5

–

VDEN hold from VCLK falling edge

Tde2chold

0.5

–

VD setup to VCLK falling edge

Tvd2csetup

0.5

–

VD hold from VCLK falling edge

Tvd2chold

0.5

–

VSYNC setup to HSYNC falling edge

Tf2hsetup

HSPW + 1

–

VSYNC hold from HSYNC falling edge

Tf2hhold HBPD + HFPD + –

HOZVAL + 3

Max

–

–

–

–

–

–

–

–

–

–

–

–

–

NOTES:

1. HSYNC period

2. VCLK period

Units

Phclk (note1)

Phclk

Phclk

Pvclk (note2)

Pvclk

Pvclk

Pvclk

Pvclk

Pvclk

Pvclk

Pvclk

Pvclk

Pvclk

Table 25-13. IIS Controller Module Signal Timing Constants

(VDD = 1.2 V ± 0.1 V, TA = 0 to 70 °C, VEXT = 3.3V ± 0.3V)

Parameter

Symbol

IISLRCK delay time

tLRCK

IISDO delay time

tSDO

IISDI Input Setup time

tSDIS

IISDI Input Hold time

tSDIH

CODEC clock frequency

fCODEC

Min

0

0

5

0

1/16

Typ.

–

–

–

–

–

Max

3

2

10

1

1

Unit

ns

ns

ns

ns

fIIS_BLOCK

Preliminary product information describes products that are in development,

for which full characterization data and associated errata are not yet available

Specifications and information herein are subject to change without notice.

25-35

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