NJU8721 Ver la hoja de datos (PDF) - Japan Radio Corporation
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NJU8721 Datasheet PDF : 13 Pages
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NJU8721
(7) Serial Audio Data Interface
(7-1) Input Data Format Selection
The digital audio interface format is selected out of I2S, MSB Justified or LSB Justified, and 16 bits or 18
bits data length.
(7-2) Input Timing
Digital audio signal data into DIN terminal is fetched into the internal shift register by BCK signal rising
edge. The fetched data in the shift register are transferred by rising edge or falling edge of LRCK as
shown below:
Data Format
I2S
MSB Justified
LSB Justified
Rising Edge
Lch Input Register
Rch Input Register
Rch Input Register
Falling Edge
Rch Input Register
Lch Input Register
Lch Input Register
BCK and LRCK must be synchronized with MCK.
LRCK
BCK
DIN
Left Channel
Right Channel
15 14 13
10
15 14 13
Figure 3.1. 16 bits I2S Data Format
10
LRCK
BCK
Left Channel
Right Channel
DIN
15 14 13
10
15 14 13
10
15
Figure 3.2. 16 bits MSB Justified Data Format
LRCK
BCK
DIN 0
Left Channel
Right Channel
15 14
3210
15 14
Figure 3.3. 16 bits LSB Justified Data Format
3210
-5-
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