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NCV7382 Ver la hoja de datos (PDF) - ON Semiconductor

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NCV7382
ON-Semiconductor
ON Semiconductor ON-Semiconductor
NCV7382 Datasheet PDF : 16 Pages
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NCV7382
The TxD pin has an internal pullup resistor connected to
VCC. This secures that an open TxD pin generates a
recessive BUS level.
RxD Output
The signal on the BUS pin will be transferred
continuously to the RxD pin. Short spikes on the bus signal
are filtered with internal circuitry (Figure 3 and Figure 7).
VS
BUS
60%
50%
VBUS_CNT_max
VhHYS
40%
VBUS_CNT_min
t
t < trec_deb
t < trec_deb
RxD
t
Figure 7. Receive Impulse Diagram
The receive threshold values VBUS_CNT_max and
VBUS_CNT_min are symmetrical to 0.5 * VS with a
hysteresis of 0.16 * VS (typical). The LIN specific receive
threshold is between 0.4 * VS and 0.6*VS.
The received BUS signal will be output to the RxD pin:
BUS < VBUS_CNT – 0.5 * VHYS
RxD = low (BUS dominant)
BUS > VBUS_CNT + 0.5 * VHYS
RxD = high, floating (BUS recessive)
RxD is a buffered open drain output with a typical load
of:
Resistance: 2.7 kW
Capacitance: < 20 pF
ENPin
The NCV7382 is switched into sleep mode with a falling
edge and into normal mode with a rising edge of the EN pin.
It will remain in normal mode as long as EN = high (See
Figure 4 Sleep Mode and Wakeup Procedure for more
details).
When the NCV7382 is switched to sleep mode, the
voltage regulator on the INH pin is switched off.
The NCV7382 can be turned off with EN = low
independent of the state of the bustransceiver.
The EN input has an internal pulled down to guarantee
a low level with EN floating.
Data Rate
The NCV7382 is a constant slew rate transceiver. The
bus driver operates with a fixed slew rate range of 1.0 V/ms
v DV/DT v 3.0 V/ms. This principle provides very good
symmetry of the slope times between recessive to dominant
and dominant to recessive slopes within the LIN bus load
range (CBUS, Rterm).
The NCV7382 guarantees data rates up to 20 kbit within
the complete bus load range under worst case conditions.
The constant slew rate principle holds appropriate voltage
levels and can operate within the LIN Protocol
Specification for RC oscillator systems with a matching
tolerance up to 2%.
Operating Under Disturbance
Loss of Battery
If VS and VCC are disconnected from the battery, the bus
pin is in high impedance state. There is no impact to the bus
traffic.
Loss of Ground
In case of an interrupted ground connection from VS and
VCC, there is no influence to the bus line.
Short Circuit to Battery
The transmitter output current is limited to 200 mA
(max) in case of short circuit to battery.
Short Circuit to Ground
Negative voltages on the BUS pin are limited primarily
to current through the internal 30 k resistor and series diode
from VS through a switched device controlled by EN.
Secondary contributions are attributed to the resistor and
diode hardwired from VS to BUS.
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