DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MPC8544E(2009) Ver la hoja de datos (PDF) - Freescale Semiconductor

Número de pieza
componentes Descripción
Fabricante
MPC8544E
(Rev.:2009)
Freescale
Freescale Semiconductor Freescale
MPC8544E Datasheet PDF : 120 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
DDR and DDR2 SDRAM
6 DDR and DDR2 SDRAM
This section describes the DC and AC electrical specifications for the DDR SDRAM interface of the
MPC8544E. Note that DDR SDRAM is GVDD(typ) = 2.5 V and DDR2 SDRAM is GVDD(typ) = 1.8 V.
6.1 DDR SDRAM DC Electrical Characteristics
Table 10 provides the recommended operating conditions for the DDR SDRAM component(s) of the
MPC8544E when GVDD(typ) = 1.8 V.
Table 10. DDR2 SDRAM DC Electrical Characteristics for GVDD(typ) = 1.8 V
Parameter/Condition
Symbol
Min
Max
Unit Notes
I/O supply voltage
GVDD
1.71
1.89
V
1
I/O reference voltage
MVREF
0.49 × GVDD
0.51 × GVDD
V
2
I/O termination voltage
VTT
MVREF – 0.04
MVREF + 0.04
V
3
Input high voltage
VIH
MVREF + 0.26
GVDD + 0.3
V
Input low voltage
VIL
–0.3
MVREF – 0.24
V
Output leakage current
IOZ
–50
50
μA
4
Output high current (VOUT = 1.26 V)
IOH
–13.4
mA
Output low current (VOUT = 0.33 V)
IOL
13.4
mA
Notes:
1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.
2. MVREF is expected to be equal to 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver. Peak-to-peak
noise on MVREF may not exceed ±2% of the DC value.
3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MVREF. This rail should track variations in the DC level of MVREF.
4. Output leakage is measured with all outputs disabled, 0 V VOUT GVDD.
Table 11 provides the DDR2 I/O capacitance when GVDD(typ) = 1.8 V.
Table 11. DDR2 SDRAM Capacitance for GVDD(typ) = 1.8 V
Parameter/Condition
Symbol
Min
Max
Unit Notes
Input/output capacitance: DQ, DQS, DQS
CIO
6
8
pF
1
Delta input/output capacitance: DQ, DQS, DQS
CDIO
0.5
pF
1
Note:
1. This parameter is sampled. GVDD = 1.8 V ± 0.090 V, f = 1 MHz, TA = 25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.2 V.
MPC8544E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3
Freescale Semiconductor
17

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]