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TDA8779

10-bit converter interface (ADC/DAC) for quadrature transceiver

Philips Electronics 

Philips Semiconductors

10-bit converter interface (ADC/DAC) for

quadrature transceiver

Objective specification

TDA8779

SYMBOL

PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

ANALOG SIGNAL PROCESSING

Linearity

INLA

DNLA

integral non linearity

differential non linearity

ramp input; fCLK = 20 MHz −

full-scale; ramp input;

−

fCLK = 20 MHz

50% full-scale; ramp input; −

fCLK = 20 MHz

±2 −

±0.5 −

±0.3 −

Noise floor; note 2

NF

noise floor

fin = 5.1 MHz; 20 Msps

−

−60 −

Harmonics; note 3

THD

total harmonic distortion

fi = 5.1 MHz; 20 Msps

−

−54 −

Spurious free dynamic range

SFDR

spurious free dynamic range

fi = 5.1 MHz; 20 Msps

45

56 −

Matching between the I and Q channels

∆V

amplitude matching

∆ϕ

phase matching

fin = 5.1 MHz;

fCLK = 20 MHz;

Tamb = 25°C

fin = 5.1 MHz;

fCLK = 20 MHz;

Tamb = 25°C

−

−

6

−

−

2

Bandwidth

B

bandwidth maximum attenuation of

full-scale sine wave;

5.5

−

−

−0.3 dB

Tamb = 25°C;

50% full-scale sine wave; tbf

−

−

Tamb = 25°C;

TIMING: (THE OUTPUT DATA IS AVAILABLE AFTER THE MAXIMUM DELAY TIME td); CL = 15 pF; see Fig.3

tds

sampling delay time

th

output hold time

td

output delay time

VCCO = 4.75 V

VCCO = 3.15 V

VCCO = 2.7 V

−

−

5

5

−

−

−

12 15

−

17 20

−

21 24

3-STATE OUTPUT DELAY TIMES; see Fig.4

tdZH

output delay enable HIGH

tdZL

output delay enable LOW

tdHZ

output delay disable HIGH

tdLZ

output delay disable LOW

−

14 18

−

16 20

−

16 20

−

14 18

LSB

LSB

LSB

dB

dB

dB

%

Deg

MHz

MHz

ns

ns

ns

ns

ns

ns

ns

ns

ns

1996 Sep 18

8

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