ML2002-1U(2008) Ver la hoja de datos (PDF) - Minilogic Device Corporation Limited

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ML2002-1U
(Rev.:2008)

Static/Half Duty LCD COG Driver

Minilogic Device Corporation Limited 

ML2002 Preliminary

ii) Oscillator

The LCD driving signal of ML2002 is clocked either by the built-in oscillator, crystal oscillator or from

an external clock.

a) Internal clock

When the internal oscillator is used, BIOEN should be connected to GND and the OOUT should be

connected to FIN. The internal oscillator will oscillate at 32 kHz and the frequency is independent in the

range of 2.5V < VDD < 6.0V . Then connect OOUT to FIN.

b) Crystal clock

When using the crystal oscillator, BCOEN is connected to GND, then connect

the crystal to OSC+, and OSC-. Then connect OSC- to FIN. The OSC+ and

OSC- should connect as:

c) External clock

When using an external clock, BCOEN & BIOEN is connected to VDD then connects the external clock

to FIN (32 KHz) or LCLK (125Hz)

iii) Timing

ML2002 have several frequencies of clock signal for the users to choose for the LCD display clock (ie.

LCLK) and the blink clock (ie.BCLK). They include the following clock signals:

Frequency of Clock Signal at FIN = 32 kHz

256/128 Hz

128/64 Hz

4 Hz

2 Hz

1 Hz

Actual Divider of FIN

1/256(1/2 Duty) or 1/128(Static)

1/128(1/2 Duty) or 1/64(Static)

1/8192

1/16384

1/32768

Target Input Pin

LCLK

BCLK

iv) Segment outputs

ML2002 has 48 segment outputs which should be connected directly to the LCD. If less than 48 segments,

the unused segments should be left open circuit.

v) Common outputs

ML2002 consists of 2 common signals (ie. COM1A & COM1B). The common outputs should be left

open-circuit if the outputs are unused. Users can disable the COM1A and COM1B by connecting the

CEN1A and CEN1B to VDD respectively. The common outputs will change to GND after disabling it.

vi) Blink

ML2002 has a blink function that users shall connect BEN to GND and input the blink clock (ie. BCLK)

either by connecting ML2002 output clock signal from Frequency Divider or an external clock signal.

Users shall disable blink function by connecting BEN to VDD.

P5/13

Preliminary, November 2008

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